公开(公告)号：US20070080405A1

公开(公告)日：2007-04-12

申请号：US11542269

申请日：2006-10-04

申请人： Naoki Kotani ,  Gen Okazaki ,  Shinji Takeoka ,  Junji Hirase ,  Akio Sebe ,  Kazuhiko Aida

发明人： Naoki Kotani ,  Gen Okazaki ,  Shinji Takeoka ,  Junji Hirase ,  Akio Sebe ,  Kazuhiko Aida

IPC分类号： H01L29/94

CPC分类号： H01L21/28097 ,  H01L21/28123 ,  H01L29/4975 ,  H01L29/66545

摘要： A semiconductor device includes: an isolation region formed in a semiconductor substrate; an active region surrounded by the isolation region in the semiconductor substrate; a gate insulating film formed on the active region; and a gate electrode formed across the boundary between the active region and the isolation region adjacent to the active region. The gate electrode includes a first portion which is located above the active region with the gate insulating film interposed therebetween and is entirely made of a silicide in a thickness direction and a second portion which is located above the isolation region and is made of a silicon region and the silicide region covering the silicon region.

摘要翻译： 半导体器件包括：形成在半导体衬底中的隔离区; 由半导体衬底中的隔离区围绕的有源区; 形成在有源区上的栅极绝缘膜; 以及形成在有源区域和邻近有源区域的隔离区域之间的边界上的栅电极。 栅电极包括位于有源区上方的第一部分，栅极绝缘膜插入其间，并且在厚度方向上完全由硅化物制成，而第二部分位于隔离区上方，并由硅区域 以及覆盖硅区域的硅化物区域。

公开(公告)号：US20070045695A1

公开(公告)日：2007-03-01

申请号：US11491936

申请日：2006-07-25

申请人： Shinji Takeoka ,  Akio Sebe ,  Junji Hirase ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida

发明人： Shinji Takeoka ,  Akio Sebe ,  Junji Hirase ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida

IPC分类号： H01L29/94

CPC分类号： H01L21/82345 ,  H01L21/28097 ,  H01L21/3212 ,  H01L21/823443 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/66545

摘要： A Ni film is deposited over the entire surface of a substrate including a silicon gate. Then, the silicon gate is partially removed by, for example, CMP, thereby leaving a Ni layer having a flat upper surface and a uniform thickness directly on the silicon gate. Subsequently, silicidation is performed, thereby forming a gate electrode having a uniform silicide phase.

摘要翻译： 在包括硅栅极的衬底的整个表面上沉积Ni膜。 然后，通过例如CMP部分去除硅栅极，由此在硅栅极上直接留下具有平坦的上表面和均匀厚度的Ni层。 随后，进行硅化，从而形成具有均匀硅化物相的栅电极。

公开(公告)号：US08587076B2

公开(公告)日：2013-11-19

申请号：US13547913

申请日：2012-07-12

申请人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

发明人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L27/108 ,  H01L31/119 ,  H01L31/062

CPC分类号： H01L29/4983 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

摘要翻译： 半导体器件包括：形成在衬底的有源区上的高介电常数栅极绝缘膜; 形成在高介电常数栅极绝缘膜上的栅电极; 以及形成在栅电极的每个侧表面上的绝缘侧壁。 高介电常数栅极绝缘膜连续地形成为从栅极下方延伸到绝缘侧壁下方。 位于绝缘侧壁下方的高介电常数栅极绝缘膜的至少一部分的厚度比位于栅电极下方的高介电常数栅极绝缘膜的厚度的厚度小。

公开(公告)号：US08253180B2

公开(公告)日：2012-08-28

申请号：US13037831

申请日：2011-03-01

申请人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

发明人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/4983 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

摘要翻译： 半导体器件包括：形成在衬底的有源区上的高介电常数栅极绝缘膜; 形成在高介电常数栅极绝缘膜上的栅电极; 以及形成在栅电极的每个侧表面上的绝缘侧壁。 高介电常数栅极绝缘膜连续地形成为从栅极下方延伸到绝缘侧壁下方。 位于绝缘侧壁下方的高介电常数栅极绝缘膜的至少一部分的厚度比位于栅电极下方的高介电常数栅极绝缘膜的厚度的厚度小。

公开(公告)号：US07732839B2

公开(公告)日：2010-06-08

申请号：US11525011

申请日：2006-09-22

申请人： Akio Sebe ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Junji Hirase ,  Kazuhiko Aida

发明人： Akio Sebe ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Junji Hirase ,  Kazuhiko Aida

IPC分类号： H01L27/10

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

摘要翻译： MIS晶体管包括栅电极部分，形成在栅电极部分的侧表面上的绝缘侧壁，源极/漏极区域和形成为覆盖栅电极部分和源极/漏极区域的应力膜。 栅电极部分的上表面的高度小于每个绝缘侧壁的上边缘的高度。 位于栅电极部分的应力膜的第一部分的厚度大于位于源/漏区上的应力膜的第二部分的厚度。

公开(公告)号：US20120273903A1

公开(公告)日：2012-11-01

申请号：US13547913

申请日：2012-07-12

申请人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

发明人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

IPC分类号： H01L29/78

CPC分类号： H01L29/4983 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

摘要翻译： 半导体器件包括：形成在衬底的有源区上的高介电常数栅极绝缘膜; 形成在高介电常数栅极绝缘膜上的栅电极; 以及形成在栅电极的每个侧表面上的绝缘侧壁。 高介电常数栅极绝缘膜连续地形成为从栅极下方延伸到绝缘侧壁下方。 位于绝缘侧壁下方的高介电常数栅极绝缘膜的至少一部分的厚度比位于栅电极下方的高介电常数栅极绝缘膜的厚度的厚度小。

公开(公告)号：US20070134898A1

公开(公告)日：2007-06-14

申请号：US11581002

申请日：2006-10-16

申请人： Shinji Takeoka ,  Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida

发明人： Shinji Takeoka ,  Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida

IPC分类号： H01L21/4763

CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L21/823842 ,  H01L29/66545

摘要： After a Ni film is deposited on a substrate on which a gate silicon layer is formed, a mask is formed above the gate silicon layer. Then, the Ni film is etched so as to leave a part of the Ni film which is located on the gate silicon layer. This restricts sideways supply of Ni present on the sides of the gate silicon layer. Thereafter, thermal treatment is performed to silicidate the gate silicon layer entirely.

摘要翻译： 在其上形成有栅极硅层的基板上沉积Ni膜之后，在栅极硅层上形成掩模。 然后，蚀刻Ni膜以留下位于栅极硅层上的Ni膜的一部分。 这限制了存在于栅极硅层侧面的Ni的侧向供应。 此后，进行热处理以完全硅化栅极硅层。

公开(公告)号：US20070090395A1

公开(公告)日：2007-04-26

申请号：US11525011

申请日：2006-09-22

申请人： Akio Sebe ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Junji Hirase ,  Kazuhiko Aida

发明人： Akio Sebe ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Junji Hirase ,  Kazuhiko Aida

IPC分类号： H01L29/45

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： A MIS transistor includes a gate electrode portion, insulating sidewalls formed on side surfaces of the gate electrode portion, source/drain regions and a stress film formed so as to cover the gate electrode portion and the source/drain regions. A height of an upper surface of the gate electrode portion is smaller than a height of an upper edge of each of the insulating sidewalls. A thickness of first part of the stress film located on the gate electrode portion is larger than a thickness of second part of the stress film located on the source/drain regions.

摘要翻译： MIS晶体管包括栅电极部分，形成在栅电极部分的侧表面上的绝缘侧壁，源极/漏极区域和形成为覆盖栅电极部分和源极/漏极区域的应力膜。 栅电极部分的上表面的高度小于每个绝缘侧壁的上边缘的高度。 位于栅电极部分的应力膜的第一部分的厚度大于位于源/漏区上的应力膜的第二部分的厚度。

公开(公告)号：US20070200185A1

公开(公告)日：2007-08-30

申请号：US11543865

申请日：2006-10-06

申请人： Junji Hirase ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Akio Sebe ,  Kazuhiko Aida

发明人： Junji Hirase ,  Naoki Kotani ,  Shinji Takeoka ,  Gen Okazaki ,  Akio Sebe ,  Kazuhiko Aida

IPC分类号： H01L29/94

CPC分类号： H01L29/4983 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659

摘要： A high dielectric constant gate insulating film is formed on an active region of a substrate, and a gate electrode is formed on the high dielectric constant gate insulating film. A high dielectric constant insulating sidewall is formed on a side face of the gate electrode.

摘要翻译： 在基板的有源区域上形成高介电常数栅极绝缘膜，在高介电常数栅极绝缘膜上形成栅电极。 在栅电极的侧面上形成高介电常数的绝缘侧壁。

公开(公告)号：US20070032007A1

公开(公告)日：2007-02-08

申请号：US11491260

申请日：2006-07-24

申请人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

发明人： Junji Hirase ,  Akio Sebe ,  Naoki Kotani ,  Gen Okazaki ,  Kazuhiko Aida ,  Shinji Takeoka

IPC分类号： H01L21/8234

CPC分类号： H01L29/4983 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833

摘要： A semiconductor device includes: a high dielectric constant gate insulating film formed on an active region in a substrate; a gate electrode formed on the high dielectric constant gate insulating film; and an insulating sidewall formed on each side surface of the gate electrode. The high dielectric constant gate insulating film is continuously formed so as to extend from under the gate electrode to under the insulating sidewall. At least part of the high dielectric constant gate insulating film located under the insulating sidewall has a smaller thickness than a thickness of part of the high dielectric constant gate insulating film located under the gate electrode.

摘要翻译： 半导体器件包括：形成在衬底的有源区上的高介电常数栅极绝缘膜; 形成在高介电常数栅极绝缘膜上的栅电极; 以及形成在栅电极的每个侧表面上的绝缘侧壁。 高介电常数栅极绝缘膜连续地形成为从栅极下方延伸到绝缘侧壁下方。 位于绝缘侧壁下方的高介电常数栅极绝缘膜的至少一部分的厚度比位于栅电极下方的高介电常数栅极绝缘膜的厚度的厚度小。