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1.
公开(公告)号:US20250021224A1
公开(公告)日:2025-01-16
申请号:US18895604
申请日:2024-09-25
Applicant: Kioxia Corporation
Inventor: Shinichi KANNO , Hiroshi NISHIMURA , Hideki YOSHIDA , Hiroshi MURAYAMA
Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.
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公开(公告)号:US20240061610A1
公开(公告)日:2024-02-22
申请号:US18499750
申请日:2023-11-01
Applicant: KIOXIA CORPORATION
Inventor: Shinichi KANNO , Hideki YOSHIDA , Naoki ESAKA , Hiroshi NISHIMURA
IPC: G06F3/06 , G06F12/1009
CPC classification number: G06F3/0656 , G06F3/061 , G06F12/1009 , G06F3/064 , G06F3/0679
Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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3.
公开(公告)号:US20230305701A1
公开(公告)日:2023-09-28
申请号:US18204854
申请日:2023-06-01
Applicant: Kioxia Corporation
Inventor: Shinichi KANNO , Hiroshi NISHIMURA , Hideki YOSHIDA , Hiroshi MURAYAMA
IPC: G06F3/06 , G06F1/3234 , G06F11/10 , G11C29/52 , H03M13/29
CPC classification number: G06F3/0604 , G06F3/0688 , G06F1/3275 , G06F3/0653 , G06F3/0659 , G06F3/0679 , G06F3/0619 , G06F3/0655 , G06F11/1068 , G11C29/52 , H03M13/2906 , G06F12/0246
Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.
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公开(公告)号:US20230076210A1
公开(公告)日:2023-03-09
申请号:US17981817
申请日:2022-11-07
Applicant: KIOXIA CORPORATION
Inventor: Shinichi KANNO , Hideki YOSHIDA , Naoki ESAKA , Hiroshi NISHIMURA
IPC: G06F3/06 , G06F12/1009
Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.
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