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公开(公告)号:US20240074214A1
公开(公告)日:2024-02-29
申请号:US18455937
申请日:2023-08-25
Applicant: KIOXIA CORPORATION
Inventor: Nobuaki OKADA , Akihiko CHIBA , Kenichi MATOBA , Haruna SUGIURA
IPC: H10B80/00 , H01L23/00 , H01L25/065 , H01L25/18
CPC classification number: H10B80/00 , H01L24/08 , H01L25/0657 , H01L25/18 , H01L2224/08145 , H01L2924/1431 , H01L2924/14511
Abstract: A semiconductor memory device includes a plurality of transistors arranged in a first direction, and arranged in a second direction and a first wiring layer disposed between a semiconductor substrate and a plurality of voltage supply wirings. Each of the plurality of transistors includes a source region and a drain region. The first wiring layer includes a plurality of first connecting portions disposed at positions overlapping with the plurality of source regions when viewed in a third direction and electrically connected to the plurality of source regions and the plurality of voltage supply wirings, a plurality of second connecting portions disposed at positions overlapping with the plurality of source regions when viewed in the third direction and electrically connected to a plurality of the drain regions and a plurality of conductive layers, and a passing wiring region disposed between a pair of the second connecting portions.
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公开(公告)号:US20220285284A1
公开(公告)日:2022-09-08
申请号:US17412022
申请日:2021-08-25
Applicant: Kioxia Corporation
Inventor: Yoichi MIZUTA , Takahiro TSURUDO , Yoshiaki TAKAHASHI , Kenichi MATOBA , Yoshifumi SHIMAMURA , Toru OZAWA , Takumi KOSAKI , Kouji NAKAO
IPC: H01L23/544 , H01L21/768 , H01L21/66
Abstract: According to one embodiment, a semiconductor device includes a circuit pattern including a plurality of unit patterns that are disposed in a repeating manner in at least one direction. The semiconductor device includes a discrimination pattern provided in the circuit pattern and configured to discriminate the unit patterns from each other.
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公开(公告)号:US20230083158A1
公开(公告)日:2023-03-16
申请号:US17682889
申请日:2022-02-28
Applicant: Kioxia Corporation
Inventor: Kenichi MATOBA , Takahiro TSURUDO , Yoshiaki TAKAHASHI , Yoichi MIZUTA , Yoshifumi SHIMAMURA , Toru OZAWA , Takumi KOSAKI , Kouji NAKAO
IPC: H01L27/11529 , H01L27/108
Abstract: A semiconductor device includes an active region, and an edge seal formed on at least a portion of an outer edge of the active region. The edge seal includes a first stacked body having a first conductive layer, and a second stacked body having a second conductive layer. The first conductive layer is coupled to a first voltage, the second conductive layer is coupled to a second voltage different from the first voltage, and the first conductive layer faces the second conductive layer.
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公开(公告)号:US20220077128A1
公开(公告)日:2022-03-10
申请号:US17184837
申请日:2021-02-25
Applicant: Kioxia Corporation
Inventor: Akihiko CHIBA , Takahiro TSURUDO , Kenichi MATOBA , Yoshifumi SHIMAMURA , Hiroaki NAKASA , Hiroyuki TAKENAKA
IPC: H01L25/18 , H01L23/00 , H01L23/528
Abstract: A semiconductor storage device includes a first semiconductor chip having a first bonding surface; and a second semiconductor chip having a second bonding surface, the second bonding surface being bonded to the first bonding surface. The first semiconductor chip includes a control circuit, a first power line connected to the control circuit and extending in a first direction, and a first pad electrode disposed on the first bonding surface. The second semiconductor chip includes a second power line extending in a second direction, a third power line connected to the second power line and extending in the first direction, a second pad electrode connected to the third power line, and a third pad electrode disposed on the second bonding surface.
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