公开(公告)号：US20220028739A1

公开(公告)日：2022-01-27

申请号：US17495417

申请日：2021-10-06

Applicant: Kioxia Corporation

Inventor： Satoshi WAKATSUKI ,  Tomohisa IINO ,  Naomi FUKUMAKI ,  Misuzu SATO ,  Masakatsu TAKEUCHI

IPC: H01L21/768

Abstract: A semiconductor device according to an embodiment includes: a barrier metal layer provided on a surface of an insulating layer; and a conductive layer having a first metal layer provided on a surface of the barrier metal layer, and a second metal layer provided on a surface of the first metal layer. The second metal layer includes an identical metal to metal of the first metal layer, and an impurity configured to remove fluorine bonded to the metal.

公开(公告)号：US20210082753A1

公开(公告)日：2021-03-18

申请号：US16814716

申请日：2020-03-10

Applicant: Kioxia Corporation

Inventor： Satoshi WAKATSUKI ,  Tomohisa IINO ,  Naomi FUKUMAKI ,  Misuzu SATO ,  Masakatsu TAKEUCHI

IPC: H01L21/768

Abstract: A semiconductor device according to an embodiment includes: a barrier metal layer provided on a surface of an insulating layer; and a conductive layer having a first metal layer provided on a surface of the barrier metal layer, and a second metal layer provided on a surface of the first metal layer. The second metal layer includes an identical metal to metal of the first metal layer, and an impurity configured to remove fluorine bonded to the metal.

公开(公告)号：US20230295801A1

公开(公告)日：2023-09-21

申请号：US17943695

申请日：2022-09-13

Applicant: Kioxia Corporation

Inventor： Shigeru KINOSHITA ,  Hiroshi TOYODA ,  Satoshi WAKATSUKI ,  Masayuki KITAMURA ,  Naomi FUKUMAKI

IPC: C23C16/455 ,  C23C16/44 ,  C23C16/40 ,  C23C16/34

CPC classification number: C23C16/45529 ,  C23C16/34 ,  C23C16/403 ,  C23C16/4408 ,  C23C16/4412 ,  C23C16/45544

Abstract: According to one embodiment, a film forming method includes alternately performing a first process including at least two times of a first sequence and a second process including at least one time of a second sequence. The first sequence includes supplying a film forming gas into a film forming chamber, supplying a first purge gas into the film forming chamber, supplying a first reduction gas into the film forming chamber, and supplying a second purge gas into the film forming chamber, in order, and the second sequence includes supplying a second reduction gas into the film forming chamber, and supplying a third purge gas into the film forming chamber, in order.

公开(公告)号：US20220195594A1

公开(公告)日：2022-06-23

申请号：US17690243

申请日：2022-03-09

Applicant: KIOXIA CORPORATION

Inventor： Masayuki KITAMURA ,  Atsuko SAKATA ,  Satoshi WAKATSUKI

IPC: C23C16/44 ,  H01L21/285 ,  C23C16/458 ,  H01L21/205 ,  C30B29/06 ,  C23C16/455 ,  H01L21/768

Abstract: A semiconductor manufacturing apparatus includes a reaction chamber configured to perform a process on a semiconductor substrate using a gas mixture comprising a first gas, and a first path configured to exhaust resultant gas that comprises the first gas from the reaction chamber. The semiconductor manufacturing apparatus further includes a first trap provided in the first path and configured to extract at least a portion of the first gas from the resultant gas, and a second path in which the trap is not provided and configured to exhaust the resultant gas from the reaction chamber.

公开(公告)号：US20210296253A1

公开(公告)日：2021-09-23

申请号：US17012317

申请日：2020-09-04

Applicant: Kioxia Corporation

Inventor： Satoshi WAKATSUKI

IPC: H01L23/532 ,  H01L23/538 ,  H01L25/065 ,  H01L21/768

Abstract: A semiconductor storage device according to an embodiment includes: an array chip having a memory cell array; a circuit chip having a circuit electrically connected to a memory cell; and a metal pad bonding the array chip and the circuit chip together. The metal pad includes an impurity. A concentration of the impurity is lowered as separating in a depth direction apart from a surface in a thickness direction of the metal pad.

公开(公告)号：US20210082944A1

公开(公告)日：2021-03-18

申请号：US16800163

申请日：2020-02-25

Applicant: Kioxia Corporation

Inventor： Jun IIJIMA ,  Masayoshi TAGAMI ,  Masayuki KITAMURA ,  Satoshi WAKATSUKI

IPC: H01L27/11575 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a substrate, a logic circuit provided on the substrate, a wiring layer including a plurality of wirings that are provided above the logic circuit, a first insulating film below the wiring layer, a plug, and a second insulating film. Each of the wirings contains copper and extends along a surface plane of the substrate in a first direction. The wirings are arranged along the surface plane of the substrate in a second direction different from the first direction. The plug extends through the first insulating film in a third direction crossing the first and second directions and is electrically connected to one of the wirings. The plug contains tungsten. The second insulating film is provided between the first insulating film and the plug.