公开(公告)号：US20050087852A1

公开(公告)日：2005-04-28

申请号：US10707683

申请日：2004-01-05

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro FUKUI ,  Tomoaki NEMOTO

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro FUKUI ,  Tomoaki NEMOTO

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L21/48 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

摘要翻译： 公开了一种芯片封装结构及其制造方法。 芯片封装结构主要包括载体，芯片和封装材料层。 为了制造芯片封装，提供了载体和多个芯片。 每个芯片至少具有在其上具有多个凸块的活性表面。 芯片和载体电连接。 形成填充芯片和载体之间的接合间隙并覆盖芯片和载体的封装材料层。 芯片和载体之间的封装材料层具有第一厚度，并且芯片上的封装材料层具有第二厚度。 第二厚度具有在第一厚度的一半到两倍之间的值。