公开(公告)号：US07061103B2

公开(公告)日：2006-06-13

申请号：US10707684

申请日：2004-01-05

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

IPC分类号： H01L23/22 ,  H01L23/34

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is flip-chip bonded and electrically connected to the carrier or another chip. There is a flip-chip bonding gap between the chip and the carrier or other chips. A heat sink is positioned on the uppermost chip. The encapsulating material layer fills the flip-chip bonding gap as well as a gap between the uppermost chip and the heat sink. A part of the surface of the heat sink away from the upper-most chip is exposed. Furthermore, the encapsulating material layer is formed in a simultaneous molding process. For example, the chip is separated from the heat sink by a distance between 0.03˜0.2 mm, and the encapsulating material has a thermal conductivity greater than 1.2 W/m.K.

摘要翻译： 公开了一种芯片封装结构。 芯片封装结构基本上包括载体，一个或多个芯片，散热器和封装材料层。 芯片中的至少一个被倒装芯片结合并电连接到载体或另一个芯片。 在芯片和载体或其他芯片之间存在倒装芯片接合间隙。 散热器位于最上面的芯片上。 封装材料层填充倒装芯片接合间隙以及最上面的芯片和散热器之间的间隙。 离开最上面的芯片的散热器表面的一部分被暴露。 此外，封装材料层以同时成型工艺形成。 例如，将芯片与散热器隔开0.03〜0.2mm的距离，封装材料的导热率大于1.2W / m·K。

公开(公告)号：US20050087852A1

公开(公告)日：2005-04-28

申请号：US10707683

申请日：2004-01-05

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro FUKUI ,  Tomoaki NEMOTO

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro FUKUI ,  Tomoaki NEMOTO

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L25/065 ,  H01L21/48 ,  H01L23/02

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

摘要翻译： 公开了一种芯片封装结构及其制造方法。 芯片封装结构主要包括载体，芯片和封装材料层。 为了制造芯片封装，提供了载体和多个芯片。 每个芯片至少具有在其上具有多个凸块的活性表面。 芯片和载体电连接。 形成填充芯片和载体之间的接合间隙并覆盖芯片和载体的封装材料层。 芯片和载体之间的封装材料层具有第一厚度，并且芯片上的封装材料层具有第二厚度。 第二厚度具有在第一厚度的一半到两倍之间的值。

公开(公告)号：US20070072339A1

公开(公告)日：2007-03-29

申请号：US11309106

申请日：2006-06-23

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

IPC分类号： H01L21/00

CPC分类号： H01L23/4334 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

摘要： A process for fabricating a chip package structure is disclosed. To fabricate the chip package structure, a carrier and a plurality of chips are provided. Each chip has an active surface and at least one of the active surfaces has a plurality of bumps thereon. The chips and the carrier are electrically connected together. Thereafter, a heat sink is attached to the back of the chips and then at least one heat-resistant buffering film is formed over part of the heat sink surface. An encapsulating material layer is formed over the carrier and filling bonding gaps between the chips and the carrier. The encapsulating material within the bonding gaps has a thickness. The maximum diameter of particles constituting the encapsulating material layer is less than half of the said thickness.

摘要翻译： 公开了一种用于制造芯片封装结构的工艺。 为了制造芯片封装结构，提供了载体和多个芯片。 每个芯片具有活性表面，并且活性表面中的至少一个在其上具有多个凸块。 芯片和载体电连接在一起。 此后，将散热器附接到芯片的背面，然后在散热器表面的一部分上形成至少一个耐热缓冲膜。 在载体上形成封装材料层，并填充芯片和载体之间的接合间隙。 接合间隙内的封装材料具有厚度。 构成封装材料层的颗粒的最大直径小于所述厚度的一半。

公开(公告)号：US20060261499A1

公开(公告)日：2006-11-23

申请号：US11462369

申请日：2006-08-04

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

IPC分类号： H01L23/28

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

摘要翻译： 公开了一种芯片封装结构及其制造方法。 芯片封装结构主要包括载体，芯片和封装材料层。 为了制造芯片封装，提供了载体和多个芯片。 每个芯片至少具有在其上具有多个凸块的活性表面。 芯片和载体电连接。 形成填充芯片和载体之间的接合间隙并覆盖芯片和载体的封装材料层。 芯片和载体之间的封装材料层具有第一厚度，并且芯片上的封装材料层具有第二厚度。 第二厚度具有在第一厚度的一半到两倍之间的值。

公开(公告)号：US07230331B2

公开(公告)日：2007-06-12

申请号：US10707683

申请日：2004-01-05

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

IPC分类号： H01L23/22 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L21/565 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package structure and a process for fabricating the same is disclosed. The chip package structure mainly comprises a carrier, a chip and an encapsulating material layer. To fabricate the chip package, a carrier and a plurality of chips are provided. Each chip has at least an active surface with a plurality of bumps thereon. The chips and the carrier are electrically connected. An encapsulating material layer that fills the bonding gap between the chips and the carriers and covers the chips and carrier is formed. The encapsulating material layer between the chips and the carrier has a first thickness and the encapsulating material layer over the chips has a second thickness. The second thickness has a value between half to twice the first thickness.

摘要翻译： 公开了一种芯片封装结构及其制造方法。 芯片封装结构主要包括载体，芯片和封装材料层。 为了制造芯片封装，提供了载体和多个芯片。 每个芯片至少具有在其上具有多个凸块的活性表面。 芯片和载体电连接。 形成填充芯片和载体之间的接合间隙并覆盖芯片和载体的封装材料层。 芯片和载体之间的封装材料层具有第一厚度，并且芯片上的封装材料层具有第二厚度。 第二厚度具有在第一厚度的一半到两倍之间的值。

公开(公告)号：US07057277B2

公开(公告)日：2006-06-06

申请号：US10707686

申请日：2004-01-05

申请人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

发明人： Kai-Chi Chen ,  Shu-Chen Huang ,  Hsun-Tien Li ,  Tzong-Ming Lee ,  Taro Fukui ,  Tomoaki Nemoto

IPC分类号： H01L23/34

CPC分类号： H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/48237 ,  H01L2224/0401 ,  H01L2924/00012

摘要： A chip package structure is disclosed. The chip package structure essentially comprises a carrier, one or more chips, a heat sink and an encapsulating material layer. At least one of the chips is bonded and electrically connected to the carrier or another chip using a flip-chip bonding technique. A flip-chip bonding gap is set up between the chip and he carrier or other chips. The heat sink is set up over the top chip. The heat sink has an area bigger than the chip. The encapsulating material layer fills up the flip-chip bonding gap and covers the carrier as well as the heat sink. The encapsulating material layer is formed in a simultaneous molding process and has a thermal conductivity more than 1.2 W/m.K. Furthermore, a plurality of standoff components may be selectively positioned on the heat sink.

摘要翻译： 公开了一种芯片封装结构。 芯片封装结构基本上包括载体，一个或多个芯片，散热器和封装材料层。 使用倒装芯片接合技术将至少一个芯片接合并电连接到载体或另一个芯片。 在芯片和载体或其他芯片之间建立了倒装芯片接合间隙。 散热器设置在顶级芯片上。 散热器的面积大于芯片。 封装材料层填充倒装芯片接合间隙并覆盖载体以及散热器。 封装材料层在同时成型工艺中形成并具有大于1.2W / m·K的导热系数。 此外，多个间隔部件可以选择性地定位在散热器上。

公开(公告)号：US06627684B2

公开(公告)日：2003-09-30

申请号：US10025346

申请日：2001-12-18

申请人： Tzong-Ming Lee ,  Hsun-Tien Li ,  Kai-Chi Chen ,  Mei-Ling Chen

发明人： Tzong-Ming Lee ,  Hsun-Tien Li ,  Kai-Chi Chen ,  Mei-Ling Chen

IPC分类号： C08K310

CPC分类号： H05K3/4673 ,  C08G59/504 ,  C08K5/17 ,  C08L63/00 ,  H05K2201/0209 ,  H05K2203/066 ,  C08L2666/08

摘要： The present invention discloses a dielectric composition having two steps of laminating temperatures. The composition is comprised of: a diamine curing agent containing asymmetrical chemical structures with different reactivity; an epoxy resin compound, containing at least two epoxy groups; and inorganic powder. In addition, flame retardant and toughener are added dependent on the requirements.

公开(公告)号：US06841094B2

公开(公告)日：2005-01-11

申请号：US10246460

申请日：2002-09-19

申请人： Hsun-Tien Li ,  Shu-Chen Huang ,  Kai-Chi Chen

发明人： Hsun-Tien Li ,  Shu-Chen Huang ,  Kai-Chi Chen

IPC分类号： H01B1/22 ,  H05K3/32

CPC分类号： H01B1/22 ,  H05K3/323 ,  H05K2201/0224 ,  Y10T428/2995

摘要： Fine conductive particles are composed of metallic conductive powder, and an insulating organic capping layer on the grains of the powder. The metallic conductive powder have grains with a diameter ranging from 1 to 20 microns, and the capping layer has a thickness of 50-400 nm, which is able to flow by thermo-pressing. The insulating organic capping layer is prepared from a silane having a reactive functionality, a fluorine-containing silane and a compound or a resin having a functionality able to reactive with the reactive functionality.

摘要翻译： 细导电颗粒由金属导电粉末和粉末颗粒上的绝缘有机覆盖层组成。 金属导电粉末具有直径范围为1至20微米的晶粒，并且覆盖层具有50-400nm的厚度，其能够通过热压而流动。 绝缘有机覆盖层由具有反应性官能团的硅烷，含氟硅烷和具有能够与反应性官能团反应的官能团的化合物或树脂制备。

公开(公告)号：US08013039B2

公开(公告)日：2011-09-06

申请号：US12163167

申请日：2008-06-27

申请人： Chia-Wen Hsu ,  Hsun-Tien Li ,  Kai-Chi Chen

发明人： Chia-Wen Hsu ,  Hsun-Tien Li ,  Kai-Chi Chen

IPC分类号： H01B3/40

CPC分类号： C08G59/4064 ,  C08G59/688 ,  C08K5/1345 ,  C08K5/526

摘要： An encapsulant composition for a light-emitting diode is provided. One embodiment of the encapsulant composition comprises: (a) about 100 parts by weight of at least one liquid bi-functional epoxy resin containing about 40˜50 weight % of aromatic ring; (b) about 55˜120 parts by weight of a curing agent comprising at least one bi-functional thiol curing agent containing aromatic ring and at least one aliphatic tetra-functional thiol curing agent, wherein the curing agent contains about 10˜50 weight % of aromatic ring and about 20˜35 weight % of sulfur; and (c) about 0.05˜0.5 parts by weight of a catalyst. The encapsulant composition having a high refractive index can be used for a solid state light emitting device to enhance light extraction efficiency.

摘要翻译： 提供了一种用于发光二极管的密封剂组合物。 密封剂组合物的一个实施方案包括：（a）约100重量份的含有约40〜50重量％芳香环的至少一种液体双官能环氧树脂; （b）约55〜120重量份的包含至少一种含有芳环的二官能硫醇固化剂和至少一种脂族四官能硫醇固化剂的固化剂，其中固化剂含有约10〜50重量％ 的芳环和约20〜35重量％的硫; 和（c）约0.05〜0.5重量份的催化剂。 具有高折射率的密封剂组合物可用于固态发光器件以提高光提取效率。

公开(公告)号：US20090093570A1

公开(公告)日：2009-04-09

申请号：US12163167

申请日：2008-06-27

申请人： Chia-Wen Hsu ,  Hsun-Tien Li ,  Kai-Chi Chen

发明人： Chia-Wen Hsu ,  Hsun-Tien Li ,  Kai-Chi Chen

IPC分类号： C08L63/02 ,  C08K5/52 ,  C08K5/13

CPC分类号： C08G59/4064 ,  C08G59/688 ,  C08K5/1345 ,  C08K5/526

摘要： An encapsulant composition for a light-emitting diode is provided. One embodiment of the encapsulant composition comprises: (a) about 100 parts by weight of at least one liquid bi-functional epoxy resin containing about 40˜50 weight % of aromatic ring; (b) about 55˜120 parts by weight of a curing agent comprising at least one bi-functional thiol curing agent containing aromatic ring and at least one aliphatic tetra-functional thiol curing agent, wherein the curing agent contains about 10˜50 weight % of aromatic ring and about 20˜35 weight % of sulfur; and (c) about 0.05˜0.5 parts by weight of a catalyst. The encapsulant composition having a high refractive index can be used for a solid state light emitting device to enhance light extraction efficiency.

摘要翻译： 提供了一种用于发光二极管的密封剂组合物。 密封剂组合物的一个实施方案包括：（a）约100重量份的至少一种含有约40〜50重量％芳环的液体双官能环氧树脂; （b）约55〜120重量份的含有至少一种含有芳环的二官能硫醇固化剂和至少一种脂肪族四官能硫醇固化剂的固化剂，其中固化剂含有约10〜50重量％ 的芳环和约20〜35重量％的硫; 和（c）约0.05〜0.5重量份的催化剂。 具有高折射率的密封剂组合物可用于固态发光器件以提高光提取效率。