公开(公告)号：US08409916B2

公开(公告)日：2013-04-02

申请号：US13233399

申请日：2011-09-15

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L21/00 ,  H01L21/16

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US08035100B2

公开(公告)日：2011-10-11

申请号：US12197573

申请日：2008-08-25

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US08174660B2

公开(公告)日：2012-05-08

申请号：US12332249

申请日：2008-12-10

申请人： Sung Ryul Kim ,  Yong-Mo Choi ,  Sung-Hoon Yang ,  Hwa-Yeul Oh ,  Kap-Soo Yoon ,  Jae-Ho Choi ,  Seong-Hun Kim

发明人： Sung Ryul Kim ,  Yong-Mo Choi ,  Sung-Hoon Yang ,  Hwa-Yeul Oh ,  Kap-Soo Yoon ,  Jae-Ho Choi ,  Seong-Hun Kim

IPC分类号： G02F1/1343

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  Y10T428/24975

摘要： Provided are a metal line, a method of forming the same, and a display using the same. To increase resistance of a metal line having a multilayered structure of CuO/Cu and prevent blister formation, a plasma treatment is performed using a nitrogen-containing gas and a silicon-containing gas or using a hydrogen or argon as and the silicon-containing gas. Accordingly, a plasma treatment layer such as a SiNx or Si layer is thinly formed on the copper layer, thereby preventing an increase in resistance of the copper layer and also preventing blister formation caused by the damage of a copper oxide layer. Consequently, it is possible to improve the reliability of a copper line and thus enhance the reliability of a device.

摘要翻译： 提供一种金属线，其形成方法和使用该线的显示器。 为了增加具有CuO / Cu多层结构的金属线的电阻并防止起泡形成，使用含氮气体和含硅气体或使用氢或氩作为含硅气体进行等离子体处理 。 因此，在铜层上薄膜地形成诸如SiN x或Si层的等离子体处理层，从而防止铜层的电阻增加，并且还防止由氧化铜层损坏引起的起泡形成。 因此，可以提高铜线的可靠性，从而提高装置的可靠性。

公开(公告)号：US07847291B2

公开(公告)日：2010-12-07

申请号：US12486328

申请日：2009-06-17

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  O-Sung Seo ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Seong-Hun Kim ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  O-Sung Seo ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Seong-Hun Kim ,  Yong-Mo Choi

IPC分类号： H01L29/04

CPC分类号： H01L27/12 ,  H01L27/1225 ,  H01L29/7869

摘要： A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.

摘要翻译： 显示基板包括： 衬底，布置在衬底上的栅电极，布置在栅电极上的半导体图案，布置在半导体图案上的源电极，布置在半导体图案上并与源电极间隔开的漏电极，布置在 并且基本上覆盖源电极和漏极以覆盖源电极和漏电极，布置在绝缘层上并与半导体图案重叠的导电层图案，与漏电极电连接的像素电极，以及 存储电极，设置在所述基板上，与所述像素电极重叠地重叠，所述存储电极与所述导电层图案电连接。

公开(公告)号：US08319905B2

公开(公告)日：2012-11-27

申请号：US12353152

申请日：2009-01-13

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： G02F1/1368 ,  H01L29/10

CPC分类号： G02F1/1368 ,  G02F2202/108 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/7869

摘要： Provided are a display substrate and a display device including the same. The display substrate includes: gate wiring; a first semiconductor pattern formed on the gate wiring and having a first energy bandgap; a second semiconductor pattern formed on the first semiconductor pattern and having a second energy bandgap which is greater than the first energy bandgap; data wiring formed on the first semiconductor pattern; and a pixel electrode electrically connected to the data wiring. Because the second energy bandgap is larger than the first energy bandgap, a quantum well is formed in the first semiconductor pattern, enhancing electron mobility therein.

摘要翻译： 提供了一种显示基板和包括该基板的显示装置。 显示基板包括：栅极布线; 形成在所述栅极布线上并具有第一能量带隙的第一半导体图案; 形成在所述第一半导体图案上并具有大于所述第一能带隙的第二能带隙的第二半导体图案; 形成在第一半导体图案上的数据布线; 以及与数据配线电连接的像素电极。 由于第二能量带隙大于第一能带隙，所以在第一半导体图案中形成量子阱，增强其中的电子迁移率。

公开(公告)号：US20090152553A1

公开(公告)日：2009-06-18

申请号：US12188956

申请日：2008-08-08

申请人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/778 ,  H01L29/78687

摘要： A thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The semiconductor pattern includes an active layer being overlapped with the gate electrode and a low band gap portion having a lower energy band gap than the active layer. The source and drain electrodes are spaced apart from each other to be overlapped with the semiconductor pattern. Therefore, the semiconductor pattern includes a low band gap portion having a lower energy band gap than the active layer, so that electron mobility may be increased in a channel formed along the low band gap portion so that electric characteristics of the TFT may be enhanced.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，半导体图案，源电极和漏电极。 半导体图案包括与栅电极重叠的有源层和具有比有源层更低的能带隙的低带隙部分。 源极和漏极彼此间隔开以与半导体图案重叠。 因此，半导体图案包括具有比有源层低的能带隙的低带隙部分，使得沿着低带隙部分形成的沟道中的电子迁移率可能增加，从而可以提高TFT的电特性。

公开(公告)号：US08189131B2

公开(公告)日：2012-05-29

申请号：US12188956

申请日：2008-08-08

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： G02F1/136

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/778 ,  H01L29/78687

摘要： A thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The semiconductor pattern includes an active layer being overlapped with the gate electrode and a low band gap portion having a lower energy band gap than the active layer. The source and drain electrodes are spaced apart from each other to be overlapped with the semiconductor pattern. Therefore, the semiconductor pattern includes a low band gap portion having a lower energy band gap than the active layer, so that electron mobility may be increased in a channel formed along the low band gap portion so that electric characteristics of the TFT may be enhanced.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，半导体图案，源电极和漏电极。 半导体图案包括与栅电极重叠的有源层和具有比有源层更低的能带隙的低带隙部分。 源极和漏极彼此间隔开以与半导体图案重叠。 因此，半导体图案包括具有比有源层低的能带隙的低带隙部分，使得沿着低带隙部分形成的沟道中的电子迁移率可能增加，从而可以提高TFT的电特性。

公开(公告)号：US20090185126A1

公开(公告)日：2009-07-23

申请号：US12332249

申请日：2008-12-10

申请人： Sung Ryul Kim ,  Yong-Mo Choi ,  Sung-Hoon Yang ,  Hwa-Yeul Oh ,  Kap-Soo Yoon ,  Jae-Ho Choi ,  Seong-Hun Kim

发明人： Sung Ryul Kim ,  Yong-Mo Choi ,  Sung-Hoon Yang ,  Hwa-Yeul Oh ,  Kap-Soo Yoon ,  Jae-Ho Choi ,  Seong-Hun Kim

IPC分类号： G02F1/1343 ,  B32B15/04 ,  B32B7/02 ,  H05H1/24 ,  H05K1/09

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  Y10T428/24975

摘要： Provided are a metal line, a method of forming the same, and a display using the same. To increase resistance of a metal line having a multilayered structure of CuO/Cu and prevent blister formation, a plasma treatment is performed using a nitrogen-containing gas and a silicon-containing gas or using a hydrogen or argon as and the silicon-containing gas. Accordingly, a plasma treatment layer such as a SiNx or Si layer is thinly formed on the copper layer, thereby preventing an increase in resistance of the copper layer and also preventing blister formation caused by the damage of a copper oxide layer. Consequently, it is possible to improve the reliability of a copper line and thus enhance the reliability of a device.

摘要翻译： 提供一种金属线，其形成方法和使用该线的显示器。 为了增加具有CuO / Cu多层结构的金属线的电阻并防止起泡形成，使用含氮气体和含硅气体或使用氢或氩作为含硅气体进行等离子体处理 。 因此，在铜层上薄膜地形成诸如SiN x或Si层的等离子体处理层，从而防止铜层的电阻增加，并且还防止由氧化铜层损坏引起的起泡形成。 因此，可以提高铜线的可靠性，从而提高装置的可靠性。

公开(公告)号：US20090180045A1

公开(公告)日：2009-07-16

申请号：US12353152

申请日：2009-01-13

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： G02F1/1368 ,  H01L27/08 ,  H01L29/02

CPC分类号： G02F1/1368 ,  G02F2202/108 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/7869

摘要： Provided are a display substrate and a display device including the same. The display substrate includes: gate wiring; a first semiconductor pattern formed on the gate wiring and having a first energy bandgap; a second semiconductor pattern formed on the first semiconductor pattern and having a second energy bandgap which is greater than the first energy bandgap; data wiring formed on the first semiconductor pattern; and a pixel electrode electrically connected to the data wiring. Because the second energy bandgap is larger than the first energy bandgap, a quantum well is formed in the first semiconductor pattern, enhancing electron mobility therein.

摘要翻译： 提供了一种显示基板和包括该基板的显示装置。 显示基板包括：栅极布线; 形成在所述栅极布线上并具有第一能量带隙的第一半导体图案; 形成在所述第一半导体图案上并具有大于所述第一能带隙的第二能带隙的第二半导体图案; 形成在第一半导体图案上的数据布线; 以及与数据配线电连接的像素电极。 由于第二能量带隙大于第一能带隙，所以在第一半导体图案中形成量子阱，增强其中的电子迁移率。

公开(公告)号：US08486775B2

公开(公告)日：2013-07-16

申请号：US13020467

申请日：2011-02-03

申请人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

发明人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC分类号： H01L21/84

CPC分类号： H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.