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公开(公告)号：US5448520A
公开(公告)日：1995-09-05
申请号：US306612
申请日：1994-09-15
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed irk the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和与衬底形成的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US4539658A
公开(公告)日：1985-09-03
申请号：US638982
申请日：1984-08-08
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108 , G11C11/40 , H01L29/78
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the data lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5689457A
公开(公告)日：1997-11-18
申请号：US611636
申请日：1996-03-06
IPC分类号： G11C7/10 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C7/1048 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US4592022A
公开(公告)日：1986-05-27
申请号：US756707
申请日：1985-07-19
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108 , G11C11/40 , G11C13/00
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the data lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5732037A
公开(公告)日：1998-03-24
申请号：US448138
申请日：1995-05-23
IPC分类号： G11C7/10 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C7/1048 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US5365478A
公开(公告)日：1994-11-15
申请号：US193896
申请日：1994-02-09
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： H01L23/522 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US5808951A
公开(公告)日：1998-09-15
申请号：US951206
申请日：1997-09-17
IPC分类号： G11C7/10 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C13/00
CPC分类号： G11C7/1048 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
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公开(公告)号：US4860255A
公开(公告)日：1989-08-22
申请号：US230046
申请日：1988-08-09
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，连接到日期线的读出放大器由在半导体衬底中形成的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US4709353A
公开(公告)日：1987-11-24
申请号：US941840
申请日：1986-12-15
IPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , G11C11/40
CPC分类号： G11C11/4096 , G11C11/409 , G11C11/4091 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the data lines, is constructed of a pair of N-channel MOSFETs formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，连接到数据线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET和形成在阱区中的一对P沟道MOSFET构成 。
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公开(公告)号：US4646267A
公开(公告)日：1987-02-24
申请号：US854502
申请日：1986-04-22
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L23/522 , H01L27/04 , H01L27/092 , H01L27/10 , H01L27/108 , G11C11/40 , G11C13/00
CPC分类号： G11C11/409 , G11C11/4091 , G11C11/4096 , G11C11/4097 , H01L23/522 , H01L27/108 , H01L27/10805 , H01L2924/0002 , H01L2924/3011 , Y10S148/164
摘要： A dynamic RAM integrated circuit of the one-element memory cell type is provided with a plurality of data lines, a sense amplifier, a plurality of word lines disposed in a manner to intersect with the data lines, and memory cells disposed at the points of intersection between the data lines and the word lines. The RAM includes a P-type semiconductor substrate and an N-type well region formed in the substrate. The memory cells are disposed within the well, and the sense amplifier, which is connected to the date lines, is constructed of a pair of N-channel MOSFETS formed in the semiconductor substrate and a pair of P-channel MOSFETs formed in the well region.
摘要翻译： 单元存储单元型的动态RAM集成电路设置有多条数据线，读出放大器，以与数据线相交的方式设置的多条字线，以及设置在数据线上的存储单元 数据线与字线之间的交点。 RAM包括P型半导体衬底和形成在衬底中的N型阱区。 存储单元设置在阱内，并且连接到日期线的读出放大器由形成在半导体衬底中的一对N沟道MOSFET形成，并且在阱区中形成一对P沟道MOSFET 。
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