摘要:
An object is to provide a vertical contour correcting device for a video signal which reduces noise without deteriorating effect of the entire contour correction. A vertical contour correcting device (VCP1) which corrects vertical contour components (S1v, S1v′) of a video signal (S1) with a given quantity of correction (K) to enhance the vertical contour (Ev) of the video signal (S1) comprises a vertical contour component extracting device (3) for detecting said vertical contour components (S1v, S1v′) from said video signal (S1), a vertical contour component correlation detector (3, 29, 8c, 8d, 4) for detecting correlation between horizontally adjacent vertical contour components (Sb, Sb′, Sb′′) from said detected vertical contour components (S1v, S1v′), and a controller (5) for determining said quantity of correction (K) on the basis of said detected correlation (Sj1), thereby varying the quantity of correction (K) in accordance with the correlation (Sj1).
摘要:
A vertical HPF and a horizontal HPF receive a video signal 101, and extract only a high frequency component in the vertical/horizontal directions, respectively. Absolute value taking parts take an absolute value of the high frequency components, respectively, and change their values to positive values. A horizontal accumulating/adding part and a vertical accumulating/adding part accumulate/add an input signal so as to output a vertical one-dimensional signal and a horizontal one-dimensional signal, respectively, each periodically having a peak value in the respective vertical and horizontal directions. A horizontal peak detecting part detects a horizontal peak position according to the horizontal one-dimensional signal. A vertical peak detecting part detects a vertical peak position according to the vertical one-dimensional signal and identifies a format thereof. A binarization part obtains a block boundary image, according to the horizontal peak position and the vertical peak position, in which pixel positions having a peak are provided with 1 and remaining pixel positions are provided with 0. In this manner, even if a block boundary to eliminate block noise thereon is not clearly identified, it becomes possible to correctly detect and eliminate the block boundary.
摘要:
A video signal of an interlaced scanning system having 525 scanning lines and a vertical scanning frequency of 60 Hz is converted to a video signal having 1050 scanning lines and a vertical scanning frequency of 120 Hz, for displaying an image by bidirectional scanning. A vertical synchronizing signal is subjected to offset processing by a ¼ horizontal scanning period when an odd field is started, thereby keeping interlaced relation between odd and even fields. The vertical synchronizing signal is subjected to offset processing by a ½ horizontal scanning period every frame, so that the scanning direction for each scanning line is reversed every frame.
摘要:
A ringing detector detects mosquito noise and ringing for outputting an image signal smoothed by a horizontal/vertical high-pass filter when mosquito noise and ringing are detected while outputting the image signal as such when neither mosquito noise nor ringing is detected, thereby properly correcting the image signal without reducing the texture specific to the image signal also in a portion continuously exhibiting fine details.
摘要:
A video signal compression apparatus extracts a specific value written in a read only memory at every system clock pulse. The specific value can be varied at every clock pulse. Therefore, for example, only the center part of a picture can be horizontally compressed. A FIFO memory may be used. It is possible to select a mode with a fixed compression ratio or a mode in which a compression ratio varies at every clock pulse. Further, the fixed compression ratio can be set from the outside. Display position of the picture can also be changed.
摘要:
A video signal processing circuit synthesizes a video signal and a graphic signal on the basis of a display switching control signal, inverts a synthesized signal on the time axis for each of a forward scanning period and a backward scanning period, and output a display signal. A speed modulating signal control circuit inverts the binarized display switching control signal on the time axis for each of the forward scanning period and the backward scanning period, expands the pulse width thereof, and feeds the display switching control signal to a speed modulating signal generating circuit. The speed modulating signal generating circuit subjects a display signal to first-order differentiation, inverts the polarity of a differentiated signal in the backward scanning signal, sets a portion, corresponding to the graphic signal, in the differentiated signal on the basis of the display switching control signal at a zero level, and generates a speed modulating signal.
摘要:
A video signal compression apparatus extracts a specific value written in a read only memory at every system clock pulse. The specific value can be varied at every clock pulse. Therefore, for example, only the center cart of a picture can be horizontally compressed A FIFO memory may be used. It is possible to select a mode with a fixed compression ratio or a mode in which a compression ratio varies at every clock pulse. Further, the fixed compression ratio can be set from the outside. Display position or the picture can also be changed.
摘要:
A video signal compression apparatus extracts a specific value written in a read only memory at every system clock pulse. The specific value can be varied at every clock pulse. Therefore, for example, only the center part of a picture can be horizontally compressed. A FIFO memory may be used. It is possible to select a mode with a fixed compression ratio or a mode in which a compression ratio varies at every clock pulse. Further, the fixed compression ratio can be set from the outside. Display position of the picture can also be changed.
摘要:
A video signal converter converts a first video signal into a second video signal by changing the number of scanning lines. A horizontal pulse synchronized with the first video signal is fed into a PLL circuit, which generates a first clock signal synchronized with the horizontal pulse. The first video signal undergoes A/D conversion by sampling with the first clock signal. The converter receives a first digital video signal which has undergone the A/D conversion, the first clock signal, the horizontal pulse, and a vertical pulse synchronized with the first video signal, and thus changes a number of scanning lines of the first video signal. The converter, next, writes a second digital video signal into a memory by synchronizing the first clock signal. Then, the second digital video signal is read out from the memory by synchronizing a second clock signal generated from another clock signal generator, and is outputted as a third digital video signal, which is converted by a D/A converter into a second video signal having a desirable number of scanning lines and being outputted without video distortion in the horizontal direction.
摘要:
A signal transmission system: that includes a signal transmission unit (101) that includes a MPEG decoder (102), which receives digital broadcasting and outputs a luminance signal Y and two color difference signals PB/PR, and a transmission path encoding circuit (103), which encodes the YPBPR outputted from the MPEG decoder (102) into signals in the forms suited to a transmission path and transmits the encoded signals; and a signal reception unit (104) that includes a transmission path decoding circuit (105), which receives the encoded YPBPR and decodes them, a Y processing circuit (106), which processes the decoded luminance signal Y, a chrominance processing circuit (107), which processes the respective decoded color difference signals PB/PR, a signal conversion circuit (108), which converts the YPBPR outputted from the Y processing circuit (106) and the chrominance processing circuit (107) into RGB signals, and a display device (108) which displays the RGB signals.
摘要翻译:一种信号传输系统,包括:信号传输单元(101),包括MPEG解码器(102),其接收数字广播并输出亮度信号Y和两个色差信号P SUB B / 和传送路径编码电路(103),其将从MPEG解码器(102)输出的YP SUB B R SUB编码为信号 适合于传输路径并发送编码信号的形式; 以及信号接收单元(104),其包括传输路径解码电路(105),该传输路径解码电路(105)接收编码的YP< B> P< R>并对其进行解码,Y处理电路 106),其处理解码的亮度信号Y,处理各个解码的色差信号P SUB B / P SUB R的色度处理电路(107),信号转换 电路(108)将从Y处理电路(106)和色度处理电路(107)输出的YP B SUB> R SUB转换成RGB信号,显示 显示RGB信号的装置(108)。