公开(公告)号：US20110138101A1

公开(公告)日：2011-06-09

申请号：US12633428

申请日：2009-12-08

申请人： Kattamuri Ekanadham ,  Il Park ,  Pratap Pattnaik

发明人： Kattamuri Ekanadham ,  Il Park ,  Pratap Pattnaik

IPC分类号： G06F12/06

CPC分类号： G06F9/30007 ,  G06F12/0817 ,  G06F12/1027

摘要： A method, system and computer program product are disclosed for maintaining data coherence, for use in a multi-node processing system where each of the nodes includes one or more components. In one embodiment, the method comprises establishing a data domain, assigning a group of the components to the data domain, sending a coherence message from a first component of the processing system to a second component of the processing system, and determining if that second component is assigned to the data domain. In this embodiment, if that second component is assigned to the data domain, the coherence message is transferred to all of the components assigned to the data domain to maintain data coherency among those components. In an embodiment, if that second component is assigned to the data domain, the first component is assigned to the data domain.

摘要翻译： 公开了用于维持数据一致性的方法，系统和计算机程序产品，用于多节点处理系统，其中每个节点包括一个或多个组件。 在一个实施例中，该方法包括建立数据域，将一组组件分配给数据域，将相干消息从处理系统的第一组件发送到处理系统的第二组件，以及确定该第二组件 被分配给数据域。 在该实施例中，如果该第二组件被分配给数据域，则将相干消息传送到分配给数据域的所有组件，以维持这些组件之间的数据一致性。 在一个实施例中，如果将该第二组件分配给数据域，则将第一组件分配给数据域。

公开(公告)号：US20090216956A1

公开(公告)日：2009-08-27

申请号：US12036476

申请日：2008-02-25

申请人： Kattamuri Ekanadham ,  Jennifer A. Navarro ,  Il Park ,  Chung-Lung Kevin Shum

发明人： Kattamuri Ekanadham ,  Jennifer A. Navarro ,  Il Park ,  Chung-Lung Kevin Shum

IPC分类号： G06F12/08

CPC分类号： G06F12/0862 ,  G06F2212/6026

摘要： A system, method, and computer program product for enhancing timeliness of cache memory prefetching in a processing system are provided. The system includes a stride pattern detector to detect a stride pattern for a stride size in an amount of bytes as a difference between successive cache accesses. The system also includes a confidence counter. The system further includes eager prefetching control logic for performing a method when the stride size is less than a cache line size. The method includes adjusting the confidence counter in response to the stride pattern detector detecting the stride pattern, comparing the confidence counter to a confidence threshold, and requesting a cache prefetch in response to the confidence counter reaching the confidence threshold. The system may also include selection logic to select between the eager prefetching control logic and standard stride prefetching control logic.

摘要翻译： 提供了一种用于增强处理系统中的高速缓存存储器预取的及时性的系统，方法和计算机程序产品。 系统包括步幅图案检测器，用于检测作为连续高速缓存访​​问之间的差异的字节量的步幅大小的步幅图案。 系统还包括置信柜台。 该系统还包括用于当步幅大小小于高速缓存行大小时执行方法的迫切预取控制逻辑。 该方法包括响应于步幅模式检测器检测步幅模式来调整置信计数器，将置信计数器与置信阈值进行比较，以及响应于达到置信阈值的置信度计数器请求高速缓存预取。 系统还可以包括选择逻辑以在急切预取控制逻辑和标准步幅预取控制逻辑之间进行选择。

公开(公告)号：US08484422B2

公开(公告)日：2013-07-09

申请号：US12633428

申请日：2009-12-08

申请人： Kattamuri Ekanadham ,  Il Park ,  Pratap Pattnaik

发明人： Kattamuri Ekanadham ,  Il Park ,  Pratap Pattnaik

IPC分类号： G06F12/08

CPC分类号： G06F9/30007 ,  G06F12/0817 ,  G06F12/1027

摘要： A method, system and computer program product are disclosed for maintaining data coherence, for use in a multi-node processing system where each of the nodes includes one or more components. In one embodiment, the method comprises establishing a data domain, assigning a group of the components to the data domain, sending a coherence message from a first component of the processing system to a second component of the processing system, and determining if that second component is assigned to the data domain. In this embodiment, if that second component is assigned to the data domain, the coherence message is transferred to all of the components assigned to the data domain to maintain data coherency among those components. In an embodiment, if that second component is assigned to the data domain, the first component is assigned to the data domain.

摘要翻译： 公开了用于维持数据一致性的方法，系统和计算机程序产品，用于多节点处理系统，其中每个节点包括一个或多个组件。 在一个实施例中，该方法包括建立数据域，将一组组件分配给数据域，将相干消息从处理系统的第一组件发送到处理系统的第二组件，以及确定该第二组件 被分配给数据域。 在该实施例中，如果该第二组件被分配给数据域，则将相干消息传送到分配给数据域的所有组件，以维持这些组件之间的数据一致性。 在一个实施例中，如果将该第二组件分配给数据域，则将第一组件分配给数据域。

公开(公告)号：US20110138125A1

公开(公告)日：2011-06-09

申请号：US12630946

申请日：2009-12-04

申请人： Kattamuri Ekanadham ,  Il Park

发明人： Kattamuri Ekanadham ,  Il Park

IPC分类号： G06F12/08

CPC分类号： G06F12/0897 ,  G06F11/348 ,  G06F12/0875 ,  G06F2201/88

摘要： An event tracking hardware engine having N (≧2) caches is invoked when an event of interest occurs, using a corresponding key. The engine stores, for each of the different kinds of events, a corresponding cumulative number of occurrences, by carrying out additional steps. In some instances, the additional steps include searching in the N caches for an entry for the key; if an entry for the key is found, and no overflow of the corresponding cumulative number of occurrences for the entry for the key would occur by incrementing the corresponding cumulative number of occurrences, incrementing; if the entry for the key is found, and overflow would occur, promoting the entry to a next highest cache; and if the entry for the key is not found, entering the entry for the key in a zeroth one of the caches with the corresponding cumulative number of occurrences being initialized. In other instances, the additional steps include searching in a zeroth one of the caches for an entry for the key; if an entry for the key is found in the zeroth one of the caches, and no overflow of the corresponding cumulative number of occurrences for the entry for the key would occur by incrementing the corresponding cumulative number of occurrences, incrementing; if the entry for the key is found in the zeroth one of the caches, and overflow would occur, promoting the entry from the zeroth one of the caches in which the entry exists to a next highest cache; and if the entry for the key is not found, entering the entry for the key in the zeroth one of the caches with the corresponding cumulative number of occurrences being initialized. The engine includes a plurality of caches and a corresponding plurality of control circuits.

摘要翻译： 使用对应的密钥，当感兴趣的事件发生时，调用具有N（≥2）个高速缓存的事件跟踪硬件引擎。 通过执行附加步骤，发动机为每种不同类型的事件存储相应的累积出现次数。 在某些情况下，附加步骤包括在N个高速缓存中搜索密钥的条目; 如果找到密钥的条目，并且通过增加相应的累积出现次数而不会发生用于密钥的条目的相应累积出现次数的溢出，则递增; 如果找到密钥的条目，并发生溢出，则将条目提升到下一个最高的缓存; 并且如果没有找到密钥的条目，则在具有对应的累积出现次数被初始化的高速缓存中的第零个密码中输入密钥的条目。 在其他情况下，附加步骤包括在第一个高速缓存中搜索用于密钥的条目; 如果在第一个高速缓存中找到密钥的条目，并且通过增加相应的累积出现次数将增加密钥的入口的相应累积出现次数的溢出， 如果在第一个高速缓存中找到密钥的条目，并且将发生溢出，则将条目存在的高速缓存中的第一个提升到下一个最高缓存; 并且如果没有找到密钥的条目，则在具有对应的累积出现次数被初始化的第一个高速缓存中输入密钥的条目。 发动机包括多个高速缓存和相应的多个控制电路。

公开(公告)号：US20080282059A1

公开(公告)日：2008-11-13

申请号：US11746269

申请日：2007-05-09

申请人： Kattamuri Ekanadham ,  Il Park ,  Pratap Chandra Pattnaik ,  Xiaowei Shen

发明人： Kattamuri Ekanadham ,  Il Park ,  Pratap Chandra Pattnaik ,  Xiaowei Shen

IPC分类号： G06F9/30

CPC分类号： G06F9/383 ,  G06F9/3455 ,  G06F9/3855

摘要： A method and apparatus for maintaining membership in a set of items to be used in a predetermined manner in a computer system. A representation of each member of the set is mapped into a number of components of a primary and secondary vector when a member is added to the set. Periodically, the primary vector is changed to the secondary vector and the secondary vector to the primary vector. When members of the set are deleted, the components of the secondary vector are changed to indicate deletion of these members after the primary vector is changed to the secondary vector. Finally, membership in the set is determined by examining the components in the primary vector, and the members in the set of items are then used in a predetermined manner in the computer system. More specifically, in a sample embodiment of the present invention, membership in the set would determine if data is to be stored or removed from cache memory in a computer system. This invention, for example, provides a low cost and high performance mechanism to phase out aging membership information in a prefeteching mechanism for caching data or instructions in a computer system.

摘要翻译： 一种用于在计算机系统中以预定方式使用的一组项目中的成员资格维护的方法和装置。 当成员添加到集合中时，集合的每个成员的表示形式映射到主要和次要向量的多个组件。 周期地，主向量被改变为次矢量，次矢量变为主矢量。 当组的成员被删除时，次要向量的组件被改变以指示在将主向量改变为次要向量之后删除这些成员。 最后，通过检查主向量中的组件来确定组中的成员资格，然后在计算机系统中以预定的方式使用该组项中的成员。 更具体地说，在本发明的一个示例实施例中，该集合的成员资格将确定数据是否要在计算机系统中的高速缓存存储器中被存储或移除。 例如，本发明提供了一种低成本和高性能的机制，用于在用于在计算机系统中缓存数据或指令的预取机制中逐步淘汰老化成员资格信息。

公开(公告)号：US08943299B2

公开(公告)日：2015-01-27

申请号：US12817609

申请日：2010-06-17

申请人： Kattamuri Ekanadham ,  Brian R. Konigsburg ,  David S. Levitan ,  Jose E. Moreira ,  David Mui ,  Il Park

发明人： Kattamuri Ekanadham ,  Brian R. Konigsburg ,  David S. Levitan ,  Jose E. Moreira ,  David Mui ,  Il Park

IPC分类号： G06F9/30

CPC分类号： G06F9/30 ,  G06F9/30134 ,  G06F9/30163 ,  G06F9/3861

摘要： A pointer is for pointing to a next-to-read location within a stack of information. For pushing information onto the stack: a value is saved of the pointer, which points to a first location within the stack as being the next-to-read location; the pointer is updated so that it points to a second location within the stack as being the next-to-read location; and the information is written for storage at the second location. For popping the information from the stack: in response to the pointer, the information is read from the second location as the next-to-read location; and the pointer is restored to equal the saved value so that it points to the first location as being the next-to-read location.

摘要翻译： 一个指针用于指向一堆信息中的下一个读取位置。 将信息推送到堆栈中：保存指针的值，该指针指向堆栈内的第一个位置作为下一个读取位置; 指针被更新，使得它指向堆栈内的第二位置作为下一个读取位置; 并且将信息写入第二位置处的存储。 为了从堆栈弹出信息：响应于指针，从第二位置读取信息作为下一个读取位置; 并且指针被恢复为等于保存的值，使得其指向作为下一个读取位置的第一位置。

公开(公告)号：US08285941B2

公开(公告)日：2012-10-09

申请号：US12036476

申请日：2008-02-25

申请人： Kattamuri Ekanadham ,  Jennifer A. Navarro ,  Il Park ,  Chung-Lung Kevin Shum

发明人： Kattamuri Ekanadham ,  Jennifer A. Navarro ,  Il Park ,  Chung-Lung Kevin Shum

IPC分类号： G06F12/06

CPC分类号： G06F12/0862 ,  G06F2212/6026

摘要： A system, method, and computer program product for enhancing timeliness of cache memory prefetching in a processing system are provided. The system includes a stride pattern detector to detect a stride pattern for a stride size in an amount of bytes as a difference between successive cache accesses. The system also includes a confidence counter. The system further includes eager prefetching control logic for performing a method when the stride size is less than a cache line size. The method includes adjusting the confidence counter in response to the stride pattern detector detecting the stride pattern, comparing the confidence counter to a confidence threshold, and requesting a cache prefetch in response to the confidence counter reaching the confidence threshold. The system may also include selection logic to select between the eager prefetching control logic and standard stride prefetching control logic.

摘要翻译： 提供了一种用于增强处理系统中的高速缓存存储器预取的及时性的系统，方法和计算机程序产品。 系统包括步幅图案检测器，用于检测作为连续高速缓存访​​问之间的差异的字节量的步幅大小的步幅图案。 系统还包括置信柜台。 该系统还包括用于当步幅大小小于高速缓存行大小时执行方法的迫切预取控制逻辑。 该方法包括响应于步幅模式检测器检测步幅模式来调整置信计数器，将置信计数器与置信阈值进行比较，以及响应于达到置信阈值的置信度计数器请求高速缓存预取。 系统还可以包括选择逻辑以在急切预取控制逻辑和标准步幅预取控制逻辑之间进行选择。

公开(公告)号：US08140761B2

公开(公告)日：2012-03-20

申请号：US12630946

申请日：2009-12-04

申请人： Kattamuri Ekanadham ,  Il Park

发明人： Kattamuri Ekanadham ,  Il Park

IPC分类号： G06F12/00

CPC分类号： G06F12/0897 ,  G06F11/348 ,  G06F12/0875 ,  G06F2201/88

摘要： An event tracking hardware engine having N (≧2) caches is invoked when an event of interest occurs, using a corresponding key. The event tracking engine stores a cumulative number of occurrences for each one of the different kinds of events, and searches in the N caches for an entry for the key. When an entry for the key is found, the engine increments the number of occurrences if no overflow of the cumulative number of occurrences would occur. However, if the incrementing would cause overflow, then instead of incrementing the cumulative number of occurrences, the engine promotes the entry for the event of interest to a next higher cache.

摘要翻译： 使用对应的密钥，当感兴趣的事件发生时，调用具有N（≥2）个高速缓存的事件跟踪硬件引擎。 事件跟踪引擎存储每种不同类型事件的累积发生次数，并在N个高速缓存中搜索密钥的条目。 当找到密钥的条目时，如果没有发生累计发生次数的溢出，引擎会增加出现次数。 然而，如果增量会导致溢出，那么引擎不会增加累积的出现次数，而是为下一个更高的缓存感兴趣的事件提升条目。

公开(公告)号：US07539844B1

公开(公告)日：2009-05-26

申请号：US12144952

申请日：2008-06-24

申请人： Kattamuri Ekanadham ,  Il Park ,  Seetharami R. Seelam

发明人： Kattamuri Ekanadham ,  Il Park ,  Seetharami R. Seelam

IPC分类号： G06F12/00

CPC分类号： G06F12/0862 ,  G06F2212/6024

摘要： A method for prefetching data from an array, A, the method including: detecting a stride, dB, of a stream of index addresses of an indirect array, B, contents of each index address having information for determining an address of an element of the array A; detecting an access pattern from the indirect array, B, to data in the array, A, wherein the detecting an access pattern includes: using a constant value of an element size, dA; using a domain size k; executing a load instruction to load bi at address, ia, and receiving index data, mbi; multiplying mbi by dA to produce the product mbi*dA; executing another load instruction to load for a column address, j, where 1≦j≦k, and receiving address aj; recording the difference, aj−mbi*dA; iterating the executing a load instruction, the multiplying, the executing another load instruction, and the recording to produce another difference; incrementing a counter by one if the difference and the another difference are the same; and confirming column address j when the counter reaches a pre-determined threshold; executing a load instruction to load bi+dB and receiving index data nextmbi; and executing a load instruction to load Aj+nextmbi*dA, where Aj=(aj−mbi*dA) when the column address j is confirmed to prefetch the data from the array, A.

摘要翻译： 一种用于从阵列预取数据的方法A，所述方法包括：检测间接阵列的索引地址流的步幅，dB，每个索引地址的内容具有用于确定所述数据的元素的地址的信息 阵列A; 检测来自间接阵列B的访问模式到数组A中的数据，其中检测访问模式包括：使用元素大小的常数值dA; 使用域大小k; 执行加载指令以在地址加载bi，ia和接收索引数据mbi; 将mbi乘以dA以产生乘积mbi * dA; 执行另一个加载指令以加载列地址j，其中1 <= j <= k，并接收地址aj; 记录差异，aj-mbi * dA; 迭代执行加载指令，乘法，执行另一加载指令和记录以产生另一差异; 如果差异和另一个差异相同，则将计数器递增1; 以及当所述计数器达到预定阈值时确认列地址j; 执行加载指令以加载bi + dB并接收索引数据nextmbi; 并且当确定列地址j从数组中预取数据时，执行加载指令以加载Aj + nextmbi * dA，其中Aj =（aj-mbi * dA）。

公开(公告)号：US07519777B1

公开(公告)日：2009-04-14

申请号：US12136808

申请日：2008-06-11

申请人： Kattamuri Ekanadham ,  Il Park ,  Pratap C. Pattnaik

发明人： Kattamuri Ekanadham ,  Il Park ,  Pratap C. Pattnaik

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/30 ,  G06F9/40 ,  G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44

CPC分类号： G06F12/0862 ,  G06F9/3455 ,  G06F9/383 ,  G06F9/3832 ,  G06F9/3848 ,  G06F2212/6026

摘要： Methods, systems and computer program products for concomitant pair per-fetching. Exemplary embodiments include a method for concomitant pair prefetching, the method including detecting a stride pattern, detecting an indirect access pattern to define an access window, prefetching candidates within the defined access window, wherein the prefetching comprises obtaining prefetch addresses from a history table, updating a miss stream window, selecting a candidate of a concomitant pair from the miss stream window, producing an index from the candidate pair, accessing an aging filter, updating the history table and selecting another concomitant pair candidate from the miss stream window.

摘要翻译： 方法，系统和计算机程序产品，用于伴随对提取。 示例性实施例包括用于并发对预取的方法，所述方法包括检测步幅模式，检测间接访问模式以定义访问窗口，在定义的访问窗口内预取候选，其中预取包括从历史表获取预取地址，更新 错过流窗口，从缺失流窗口中选择伴随对的候选，从候选对产生索引，访问老化过滤器，更新历史表并从缺失流窗口中选择另一个伴随对候选者。