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    Catalyst for &agr;-olefin polymerization
    1.
    发明授权
    Catalyst for &agr;-olefin polymerization 失效
    α-烯烃聚合催化剂

    公开(公告)号：US06420500B1

    公开(公告)日：2002-07-16

    申请号：US09147328

    申请日：1998-12-31

    申请人： Kazuo Soga ,  Toshiya Uozumi ,  Eiichi Kaji

    发明人： Kazuo Soga ,  Toshiya Uozumi ,  Eiichi Kaji

    IPC分类号： C08F432

    CPC分类号： C08F10/00 ,  C08F110/06 ,  C08F210/16 ,  C08F4/6494 ,  C08F4/6543 ,  C08F4/6465 ,  C08F4/64058 ,  C08F210/14

    摘要： A novel supported catalyst component useful for &agr;-olefin polymerization and a method of polymerizing an &agr;-olefin using the same. The catalyst component is characterized by being prepared by contacting a complex represented by general formula (I) wherein R1 and R2 are the same or different and each represents a C1-6 linear or branched alkyl, a C1-3 haloalkyl, or optionally substituted phenyl; and X represents a halogeno with magnesium compound.

    摘要翻译： 可用于α-烯烃聚合的新型负载型催化剂组分和使用其进行聚合的α-烯烃的方法。 催化剂组分的特征在于通过使通式（I）表示的络合物与其中R 1和R 2相同或不同并且各自表示C 1-6直链或支链烷基，C 1-3卤代烷基或任选取代的苯基 ; X表示卤素与镁化合物。

    PLL circuit with improved phase difference detection
    5.
    发明授权
    PLL circuit with improved phase difference detection 有权
    PLL电路具有改进的相位差检测

    公开(公告)号：US07859344B2

    公开(公告)日：2010-12-28

    申请号：US12111458

    申请日：2008-04-29

    申请人： Toshiya Uozumi ,  Keisuke Ueda ,  Mitsunori Samata ,  Satoru Yamamoto ,  Russell P Mohn ,  Aleksander Dec ,  Ken Suyama

    发明人： Toshiya Uozumi ,  Keisuke Ueda ,  Mitsunori Samata ,  Satoru Yamamoto ,  Russell P Mohn ,  Aleksander Dec ,  Ken Suyama

    IPC分类号： H03L7/00

    CPC分类号： H03L7/091 ,  H03K5/135 ,  H03L7/093 ,  H03L7/193

    摘要： In an ADPLL composed of a digital circuit, a technique improving phase difference detection in a vicinity of a phase difference of 0 (zero) is provided. A feedback loop comprises a PFD comparing phases and frequencies of a reference signal and a feedback signal, a TDC converting an output of the PFD into a digital value, a DLF removing a high frequency noise component from an output of the TDC, a DCO controlled based on an output of the DLF and a DIV frequency-dividing an output the DCO and outputting the feedback signal. An offset value is added at any portion of the feedback loop, a phase of the feedback signal is controlled and a value other than 0 is inputted to the TDC even when the ADPLL is locked.

    摘要翻译： 在由数字电路构成的ADPLL中，提供了在相位差0（零）附近改善相位差检测的技术。 反馈环路包括比较参考信号和反馈信号的相位和频率的PFD，将PFD的输出转换为数字值的TDC，从TDC的输出去除高频噪声分量的DLF，DCO控制 基于DLF的输出和DIV对DCO的输出进行分频并输出反馈信号。 在反馈回路的任何部分附加偏移值，即使ADPLL被锁定，反馈信号的相位被控制，并且除了0之外的值被输入到TDC。

    Semiconductor integrated circuit device for communication
    6.
    发明授权
    Semiconductor integrated circuit device for communication 失效
    半导体集成电路器件进行通讯

    公开(公告)号：US07647033B2

    公开(公告)日：2010-01-12

    申请号：US11626585

    申请日：2007-01-24

    申请人： Toshiya Uozumi ,  Jiro Shimbo

    发明人： Toshiya Uozumi ,  Jiro Shimbo

    IPC分类号： H04B1/06 ,  H04Q7/20

    CPC分类号： H03L7/1976 ,  H03C3/0925 ,  H03C3/0933 ,  H03C3/0941 ,  H03L7/07

    摘要： A level converter level-converts an oscillation output signal of a reference frequency oscillator and supplies the level-converted signal to a phase comparator of a PLL/fractional synthesizer for controlling an oscillation frequency of an RF transmission voltage-controlled oscillator. The level converter includes a self-bias type voltage amplifier which amplifies a reference frequency signal of the reference frequency oscillator. The self-bias type voltage amplifier includes a coupling capacitor, an amplifying transistor, a load and a bias element and suppresses a variation in the level of each harmonic component even though an external power supply voltage varies.

    摘要翻译： 电平转换器电平转换参考频率振荡器的振荡输出信号，并将电平转换信号提供给PLL /分数合成器的相位比较器，用于控制RF发射压控振荡器的振荡频率。 电平转换器包括放大参考频率振荡器的参考频率信号的自偏置型电压放大器。 自偏置型电压放大器包括耦合电容器，放大晶体管，负载和偏置元件，并且即使外部电源电压变化也抑制每个谐波分量的电平变化。

    Communication semiconductor integrated circuit device and wireless communication system
    7.
    发明授权
    Communication semiconductor integrated circuit device and wireless communication system 失效
    通信半导体集成电路器件和无线通信系统

    公开(公告)号：US07154341B2

    公开(公告)日：2006-12-26

    申请号：US10994280

    申请日：2004-11-23

    申请人： Satoru Yamamoto ,  Hirotaka Oosawa ,  Toshiya Uozumi ,  Noriyuki Kurakami ,  Jiro Shinbo

    发明人： Satoru Yamamoto ,  Hirotaka Oosawa ,  Toshiya Uozumi ,  Noriyuki Kurakami ,  Jiro Shinbo

    IPC分类号： H03L7/00

    CPC分类号： H03L7/193 ,  H03L7/099 ,  H03L7/10 ,  H03L7/199

    摘要： A communication semiconductor integrated circuit device includes an RFVCO and a TXVCO and is formed over one semiconductor substrate, and has a first operation mode (idle mode) which does not perform transmission and reception, a second operation mode (warmup mode) which performs a preparation prior to the start of transmission or reception, and a third operation mode (transmission or reception mode) which performs transmission or reception. In the first operation mode, two oscillators are deactivated, and the operation of selecting a frequency band to be used in at least the TXVCO which generates a transmit signal, is performed in the second operation mode. In the communication semiconductor integrated circuit device, a high frequency signal generator which generates a signal having a desired frequency with an oscillation signal outputted from a crystal oscillator as a reference signal, a reception system circuit (RXC) including a frequency converter, and a transmission system circuit (TXC) including the TXVCO which generates the transmit signal, are respectively formed in different semiconductor regions isolated by insulators.

    摘要翻译： 通信半导体集成电路器件包括RFVCO和TXVCO，并且形成在一个半导体衬底上，并且具有不执行发送和接收的第一操作模式（空闲模式），执行准备的第二操作模式（预热模式） 在发送或接收开始之前，以及执行发送或接收的第三操作模式（发送或接收模式）。 在第一操作模式中，两个振荡器被去激活，并且在第二操作模式中执行选择在至少产生发送信号的TXVCO中使用的频带的操作。 在通信半导体集成电路装置中，生成具有从晶体振荡器输出的振荡信号作为参考信号的期望频率的信号的高频信号发生器，包括变频器的接收系统电路（RXC）和发送 包括产生发送信号的TXVCO的系统电路（TXC）分别形成在由绝缘体隔离的不同的半导体区域中。

    Wireless communication semiconductor integrated circuit device and mobile communication system
    8.
    发明申请
    Wireless communication semiconductor integrated circuit device and mobile communication system 失效
    无线通信半导体集成电路器件和移动通信系统

    公开(公告)号：US20060267699A1

    公开(公告)日：2006-11-30

    申请号：US11501778

    申请日：2006-08-10

    申请人： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

    发明人： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

    IPC分类号： H03L7/00

    CPC分类号： H03L7/099 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/199

    摘要： An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.

    摘要翻译： 在不增加功耗或芯片尺寸的情况下，实现将包括环路滤波器的PLL电路并入半导体芯片的RF IC。 RF IC包括能够切换振荡频带的VCO，可变分频器，相位比较器和环路滤波器，其包含在PLL环路中。 判别电路基于参考信号鉴别来自可变分频器的输出信号的相位的引导或滞后，并且自动频带选择电路根据鉴别电路的输出产生用于切换VCO的频带的信号。 在通过平分算法切换VCO的频带的同时，RF IC检测最佳频带，并向其添加偏移量以确定最终可用频带。

    Wireless communication semiconductor integrated circuit device and mobile communication system
    10.
    发明申请
    Wireless communication semiconductor integrated circuit device and mobile communication system 失效
    无线通信半导体集成电路器件和移动通信系统

    公开(公告)号：US20050068119A1

    公开(公告)日：2005-03-31

    申请号：US10945915

    申请日：2004-09-22

    申请人： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

    发明人： Toshiya Uozumi ,  Hirotaka Osawa ,  Jiro Shinbo ,  Satoru Yamamoto

    IPC分类号： H03L7/10 ,  H03L7/00 ,  H03L7/089 ,  H03L7/099 ,  H03L7/187 ,  H03L7/199

    CPC分类号： H03L7/099 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/199

    摘要： An RF IC in which a PLL circuit including a loop filter is incorporated into a semiconductor chip is achieved without increasing power consumption or chip size. The RF IC includes a VCO capable of switching oscillation frequency bands, a variable frequency divider, a phase comparator, and a loop filter, which are contained in the PLL loop. A discrimination circuit discriminates a lead or lag in a phase of an output signal from the variable frequency divider against a reference signal and an automatic band selecting circuit generates a signal for switching the frequency bands of the VCO based on output from the discrimination circuit. While switching the frequency bands of the VCO by means of bisection algorithm, the RF IC detects an optimum frequency band, and adds offset to it to determine a final usable frequency band.

    摘要翻译： 在不增加功耗或芯片尺寸的情况下，实现将包括环路滤波器的PLL电路并入半导体芯片的RF IC。 RF IC包括能够切换振荡频带的VCO，可变分频器，相位比较器和环路滤波器，其包含在PLL环路中。 判别电路基于参考信号鉴别来自可变分频器的输出信号的相位的引导或滞后，并且自动频带选择电路根据鉴别电路的输出产生用于切换VCO的频带的信号。 在通过平分算法切换VCO的频带的同时，RF IC检测最佳频带，并向其添加偏移量以确定最终可用频带。