公开(公告)号：US20090102545A1

公开(公告)日：2009-04-23

申请号：US11917692

申请日：2006-04-25

申请人： Shigetaka Takagi ,  Nobuo Fujii ,  Takahide Sato ,  Kazuyuki Wada

发明人： Shigetaka Takagi ,  Nobuo Fujii ,  Takahide Sato ,  Kazuyuki Wada

IPC分类号： H04B1/10

CPC分类号： H04L25/085

摘要： An input signal (Vin) is divided into n (≧3) number of divided signals which are weighted by first weights (ki). The weighted divided signals are processed by n number of signal processing means 1 to n performing the same signal processing. The processed divided signals are weighted by second weights (li) and added to obtain an output signal (Vout). By selecting the first weights (ki) and the second weights (li), it is possible to eliminate noise or eliminate distortion.

摘要翻译： 输入信号（Vin）被划分成由第一权重（ki）加权的n（> = 3）个分割信号。 加权分频信号由n个信号处理装置1至n执行相同的信号处理。 经处理的分频信号由第二权重（li）加权并相加以获得输出信号（Vout）。 通过选择第一权重（ki）和第二权重（li），可以消除噪声或消除失真。

公开(公告)号：US06388520B2

公开(公告)日：2002-05-14

申请号：US09741953

申请日：2000-12-19

申请人： Kazuyuki Wada ,  Shigetaka Takagi ,  Nobuo Fujii

发明人： Kazuyuki Wada ,  Shigetaka Takagi ,  Nobuo Fujii

IPC分类号： H03F345

CPC分类号： H03F3/45192 ,  H03F1/301 ,  H03F3/45475 ,  H03F2200/513 ,  H03F2203/45028 ,  H03F2203/45138

摘要： A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier, a load resistor having one end connected to an output terminal of the current output amplifier and a voltage control circuit having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.

摘要翻译： 半导体集成电路包括放大器电路，其包括电流输出放大器，负载电阻器，其一端连接到电流输出放大器的输出端;以及电压控制电路，其输入端连接到负载电阻的一端， 输出端子连接到负载电阻的另一端。 放大电路的输入端作为电流输出放大器的输入端，放大电路的输出端作为负载电阻的各端。

公开(公告)号：US06476676B1

公开(公告)日：2002-11-05

申请号：US09889154

申请日：2001-07-12

申请人： Satoshi Tanaka ,  Shigetaka Takagi ,  Nobuo Fujii

发明人： Satoshi Tanaka ,  Shigetaka Takagi ,  Nobuo Fujii

IPC分类号： H03F345

CPC分类号： H03F3/45959 ,  H03F3/45291 ,  H03F3/45946 ,  H03F2200/372 ,  H03H11/0422 ,  H03H2011/0494

摘要： When an input signal to be amplified is very small and a large blocking signal having a high frequency is included in an input, it is necessary for a filter for mobile communication for removing thereof that a common-mode signal rejection ratio is large. Further, even in the case of an amplifier having a high gain, it is preferable that the common-mode rejection ratio is large in order to avoid saturation of the amplifier by noise. A common-mode rejecting characteristic is added to an input stage by making transconductance circuits of an input of an integrating circuit proposed by Nauta differential circits and connecting thereof in cross connection. Thereby, a filter as well as an amplifier improving the common-mode rejection ratio of a total, are realized by being applied to a CMOS process or a BiCMOS process.

摘要翻译： 当要被放大的输入信号非常小并且具有高频率的大阻塞信号被包括在输入中时，移动通信用滤波器需要去除共模信号抑制比大。 此外，即使在具有高增益的放大器的情况下，为了避免放大器的噪声饱和，优选地，共模抑制比较大。 通过使Nauta差分电路提出的积分电路的输入的跨导电路和其交叉连接而将共模抑制特性添加到输入级。 因此，通过应用于CMOS工艺或BiCMOS工艺来实现滤波器以及提高总共模抑制比的放大器。

公开(公告)号：US06664854B2

公开(公告)日：2003-12-16

申请号：US10232722

申请日：2002-09-03

申请人： Satoshi Tanaka ,  Shigetaka Takagi ,  Nobuo Fujii

发明人： Satoshi Tanaka ,  Shigetaka Takagi ,  Nobuo Fujii

IPC分类号： H03F345

CPC分类号： H03F3/45959 ,  H03F3/45291 ,  H03F3/45946 ,  H03F2200/372 ,  H03H11/0422 ,  H03H2011/0494

摘要： When an input signal to be amplified is very small and a large blocking signal having a high frequency is included in an input, it is necessary for a filter for mobile communication for removing thereof that a common-mode signal rejection ratio is large. Further, even in the case of an amplifier having a high gain, it is preferable that the common-mode rejection ratio is large in order to avoid saturation of the amplifier by noise. A common-mode rejecting characteristic is added to an input stage by making transconductance circuits of an input of an integrating circuit proposed by Nauta differential circuits and connecting thereof in cross connection. Thereby, a filter as well as an amplifier improving the common-mode rejection ratio of a total, are realized by being applied to a CMOS process or a BiCMOS process.

摘要翻译： 当要被放大的输入信号非常小并且具有高频率的大阻塞信号被包括在输入中时，移动通信用滤波器需要去除共模信号抑制比大。 此外，即使在具有高增益的放大器的情况下，为了避免放大器的噪声饱和，优选地，共模抑制比较大。 通过由Nauta差分电路提出的积分电路的输入的跨导电路和其交叉连接来将共模抑制特性添加到输入级。 因此，通过应用于CMOS工艺或BiCMOS工艺来实现滤波器以及提高总共模抑制比的放大器。

公开(公告)号：US20080100366A1

公开(公告)日：2008-05-01

申请号：US11812371

申请日：2007-06-18

申请人： Shigetaka Takagi ,  Yosuke Sakai ,  Tetsuro Itakura ,  Koichiro Mashiko

发明人： Shigetaka Takagi ,  Yosuke Sakai ,  Tetsuro Itakura ,  Koichiro Mashiko

IPC分类号： G06G7/14

CPC分类号： H03M1/0614 ,  H03M1/121

摘要： A signal processing method and apparatus reducing distortion using divided signals differing in only amplitude by weighting an input signal by first weights ki (i=1 to 4) to obtain divided signals, performing the same signal processing f(x) on the divided signals, weighting the signal processed divided signals by second weights l1 (i=1 to 4), and adding the divided signals Vout1 to Vout4 weighted by the second weights. The first weights are k1=t, k2=−t, k3=1, k4=−1, while the second weights are l1=−1, l2=1, l3=t3, l4=−t3. Here, t=b/a (where a and b are different positive integers).

摘要翻译： 一种信号处理方法和装置，通过使用第一权重k i i（i = 1〜4）对输入信号进行加权，仅使幅度不同的分割信号减少失真，以获得分割信号，执行相同的信号处理f （x）对所分割的信号进行加权，通过第二权重I 1（i = 1至4）对信号处理的分频信号进行加权，并将分频信号V OUT1加到V 由第二权重加权的 _{out4 。 第一个权重是k 1 = t，k 2 = - t，k 3 = 1，k 4＆lt; 4＆gt; = -1，而第二权重为l 1 = -1，则1 = 1，1/3 3 = t 3， / SUP>，1＆lt; 4＆gt; = - 3＆lt; 3＆gt; 3。 这里，t = b / a（其中 a和 b是不同的正整数）。}