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    SIGNAL PROCESSING METHOD AND SIGNAL PROCESSING APPARATUS
    1.
    发明申请
    SIGNAL PROCESSING METHOD AND SIGNAL PROCESSING APPARATUS 审中-公开
    信号处理方法和信号处理装置

    公开(公告)号：US20090102545A1

    公开(公告)日：2009-04-23

    申请号：US11917692

    申请日：2006-04-25

    申请人： Shigetaka Takagi ,  Nobuo Fujii ,  Takahide Sato ,  Kazuyuki Wada

    发明人： Shigetaka Takagi ,  Nobuo Fujii ,  Takahide Sato ,  Kazuyuki Wada

    IPC分类号： H04B1/10

    CPC分类号： H04L25/085

    摘要： An input signal (Vin) is divided into n (≧3) number of divided signals which are weighted by first weights (ki). The weighted divided signals are processed by n number of signal processing means 1 to n performing the same signal processing. The processed divided signals are weighted by second weights (li) and added to obtain an output signal (Vout). By selecting the first weights (ki) and the second weights (li), it is possible to eliminate noise or eliminate distortion.

    摘要翻译： 输入信号（Vin）被划分成由第一权重（ki）加权的n（> = 3）个分割信号。 加权分频信号由n个信号处理装置1至n执行相同的信号处理。 经处理的分频信号由第二权重（li）加权并相加以获得输出信号（Vout）。 通过选择第一权重（ki）和第二权重（li），可以消除噪声或消除失真。

    Semiconductor integrated circuit
    2.
    发明授权
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号：US06388520B2

    公开(公告)日：2002-05-14

    申请号：US09741953

    申请日：2000-12-19

    申请人： Kazuyuki Wada ,  Shigetaka Takagi ,  Nobuo Fujii

    发明人： Kazuyuki Wada ,  Shigetaka Takagi ,  Nobuo Fujii

    IPC分类号： H03F345

    CPC分类号： H03F3/45192 ,  H03F1/301 ,  H03F3/45475 ,  H03F2200/513 ,  H03F2203/45028 ,  H03F2203/45138

    摘要： A semiconductor integrated circuit comprises an amplifier circuit including a current output amplifier, a load resistor having one end connected to an output terminal of the current output amplifier and a voltage control circuit having an input terminal connected to the one end of the load resistor and an output terminal connected to an other end of the load resistor. The input terminal of the amplifier circuit serves as an input terminal of the current output amplifier, and the output terminals of the amplifier circuit serve as the individual ends of the load resistor.

    摘要翻译： 半导体集成电路包括放大器电路，其包括电流输出放大器，负载电阻器，其一端连接到电流输出放大器的输出端;以及电压控制电路，其输入端连接到负载电阻的一端， 输出端子连接到负载电阻的另一端。 放大电路的输入端作为电流输出放大器的输入端，放大电路的输出端作为负载电阻的各端。

    Voltage-to-current conversion circuit and OTA using the same
    3.
    发明授权
    Voltage-to-current conversion circuit and OTA using the same 失效
    电压 - 电流转换电路和OTA使用相同

    公开(公告)号：US06661289B2

    公开(公告)日：2003-12-09

    申请号：US10176063

    申请日：2002-06-21

    申请人： Takahide Sato ,  Nobuo Fujii ,  Sigetaka Takagi ,  Kazuyuki Wada

    发明人： Takahide Sato ,  Nobuo Fujii ,  Sigetaka Takagi ,  Kazuyuki Wada

    IPC分类号： H03F316

    CPC分类号： G05F1/561 ,  G05F3/242

    摘要： A voltage-to-current conversion circuit composed of MOSFETs of the same polarity and an OTA with Rail-to-Rail with a simple configuration that uses the same have been disclosed. The voltage-to-current conversion circuit comprises a first MOSFET, to which a fixed drain-source voltage is applied all the time, and which generates a first current signal for an input voltage, a second MOSFET, which has the same polarity as that of the first MOSFET, to which the fixed drain-source voltage is applied all the time, and which generates a second current signal complementary to the first current signal for the input voltage, and a difference current operation circuit that performs the operation of subtraction between the first current signal and the second current signal, thereby an output current is generated in accordance with the input voltage.

    摘要翻译： 已经公开了由具有相同极性的MOSFET组成的电压 - 电流转换电路和具有使用它们的简单配置的轨至轨的OTA。 电压 - 电流转换电路包括第一MOSFET，一直施加固定的漏极 - 源极电压，并且其产生用于输入电压的第一电流信号，第二MOSFET具有与之相同极性的第二MOSFET 所述第一MOSFET的固定漏极 - 源极电压一直被施加到所述第一MOSFET，并且产生与所述输入电压的所述第一电流信号互补的第二电流信号;以及差动电流运算电路， 第一电流信号和第二电流信号，从而根据输入电压产生输出电流。

    Switching circuit
    4.
    发明授权
    Switching circuit 有权
    开关电路

    公开(公告)号：US08760223B2

    公开(公告)日：2014-06-24

    申请号：US13490101

    申请日：2012-06-06

    申请人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Hiroshi Ishioka

    发明人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka

    IPC分类号： H02M3/07

    CPC分类号： H03K17/04123 ,  H03K2217/0036 ,  H03K2217/0045 ,  H03K2217/009

    摘要： A switching circuit according to one embodiment is a switching circuit including at least one semiconductor switch element having an input, output, and a common terminals, a pulse-like signal being applied between the input and common terminals to switch a current between the output and common terminals. The switching circuit further includes a capacitance suppression element section connected at least one of between the input and output terminals, between the input terminal common terminals, and between the output and common terminals. The capacitance suppression element section reduces a parasitic capacitance between the terminals of the semiconductor switch element where the capacitance suppression element section is connected to less than that obtained when the capacitance suppression element section is not connected at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse-like signal.

    摘要翻译： 根据一个实施例的开关电路是包括具有输入，输出和公共端子的至少一个半导体开关元件的开关电路，脉冲状信号被施加在输入端和公共端子之间以切换输出和 公共终端 开关电路还包括电容抑制元件部分，其连接在输入和输出端子之间，输入端子公共端子之间以及输出端子和公共端子之间的至少一个。 电容抑制元件部分减小了电容抑制元件部分连接的半导体开关元件的端子之间的寄生电容小于当电容抑制元件部分未以N倍的频率连接时获得的寄生电容（N为 1或更高）与脉冲状信号的时钟频率一样高。

    SWITCHING CIRCUIT
    5.
    发明申请
    SWITCHING CIRCUIT 有权
    切换电路

    公开(公告)号：US20120306288A1

    公开(公告)日：2012-12-06

    申请号：US13490240

    申请日：2012-06-06

    申请人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka ,  Hiroshi Ishioka

    发明人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka ,  Hiroshi Ishioka

    IPC分类号： H01H47/00

    CPC分类号： H03K17/04123 ,  H03K2217/0036 ,  H03K2217/0045 ,  Y10T307/747

    摘要： A switching circuit according to one embodiment includes first to fourth semiconductor switch elements. A pulse-like signal is applied to each input terminal of the switch elements such that when the first and fourth switch elements are in an ON (OFF) state, the remaining switch elements are in an OFF (ON) state. The switching circuit includes first and second capacitance elements. The first capacitance elements connected between an output terminal of the second semiconductor switch element and the second capacitance elements connected between an input terminal of the second semiconductor switch element and an output terminal of the fourth semiconductor switch element has a capacitance to reduce a parasitic capacitance between the input and output terminals of each of the fourth and second switch elements at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse-like signal.

    摘要翻译： 根据一个实施例的开关电路包括第一至第四半导体开关元件。 脉冲状信号被施加到开关元件的每个输入端子，使得当第一和第四开关元件处于导通（OFF）状态时，剩余的开关元件处于断开（ON）状态。 开关电路包括第一和第二电容元件。 连接在第二半导体开关元件的输出端子和连接在第二半导体开关元件的输入端子和第四半导体开关元件的输出端子之间的第二电容元件之间的第一电容元件具有电容以减小第二半导体开关元件的输出端之间的寄生电容 以与脉冲状信号的时钟频率相同的频率N倍（N为1以上的整数）的第四开关元件和第二开关元件的输入输出端子。

    Switching circuit
    8.
    发明授权
    Switching circuit 有权
    开关电路

    公开(公告)号：US08766699B2

    公开(公告)日：2014-07-01

    申请号：US13490240

    申请日：2012-06-06

    申请人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Hiroshi Ishioka

    发明人： Kazuhiro Fujikawa ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka

    IPC分类号： H03K17/30

    CPC分类号： H03K17/04123 ,  H03K2217/0036 ,  H03K2217/0045 ,  Y10T307/747

    摘要： A switching circuit according to one embodiment includes first to fourth semiconductor switch elements. A pulse-like signal is applied to each input terminal of the switch elements such that when the first and fourth switch elements are in an ON (OFF) state, the remaining switch elements are in an OFF (ON) state. The switching circuit includes first and second capacitance elements. The first capacitance elements connected between an output terminal of the second semiconductor switch element and the second capacitance elements connected between an input terminal of the second semiconductor switch element and an output terminal of the fourth semiconductor switch element has a capacitance to reduce a parasitic capacitance between the input and output terminals of each of the fourth and second switch elements at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse-like signal.

    摘要翻译： 根据一个实施例的开关电路包括第一至第四半导体开关元件。 脉冲状信号被施加到开关元件的每个输入端子，使得当第一和第四开关元件处于导通（OFF）状态时，剩余的开关元件处于断开（ON）状态。 开关电路包括第一和第二电容元件。 连接在第二半导体开关元件的输出端子和连接在第二半导体开关元件的输入端子和第四半导体开关元件的输出端子之间的第二电容元件之间的第一电容元件具有电容以减小第二半导体开关元件的输出端之间的寄生电容 以与脉冲状信号的时钟频率相同的频率N倍（N为1以上的整数）的第四开关元件和第二开关元件的输入输出端子。

    SWITCHING CIRCUIT
    10.
    发明申请
    SWITCHING CIRCUIT 有权
    切换电路

    公开(公告)号：US20120306563A1

    公开(公告)日：2012-12-06

    申请号：US13490101

    申请日：2012-06-06

    申请人： Kazuhiro FUJIKAWA ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka ,  Hiroshi Ishioka

    发明人： Kazuhiro FUJIKAWA ,  Nobuo Shiga ,  Takashi Ohira ,  Kazuyuki Wada ,  Kazuya Ishioka ,  Hiroshi Ishioka

    IPC分类号： H03K17/687

    CPC分类号： H03K17/04123 ,  H03K2217/0036 ,  H03K2217/0045 ,  H03K2217/009

    摘要： A switching circuit according to one embodiment is a switching circuit including at least one semiconductor switch element having an input, output, and a common terminals, a pulse-like signal being applied between the input and common terminals to switch a current between the output and common terminals. The switching circuit further includes a capacitance suppression element section connected at least one of between the input and output terminals, between the input terminal common terminals, and between the output and common terminals. The capacitance suppression element section reduces a parasitic capacitance between the terminals of the semiconductor switch element where the capacitance suppression element section is connected to less than that obtained when the capacitance suppression element section is not connected at a frequency N times (N is an integer of 1 or more) as high as a clock frequency of the pulse-like signal.

    摘要翻译： 根据一个实施例的开关电路是包括具有输入，输出和公共端子的至少一个半导体开关元件的开关电路，脉冲状信号被施加在输入端和公共端子之间以切换输出和 公共终端 开关电路还包括电容抑制元件部分，其连接在输入和输出端子之间，输入端子公共端子之间以及输出端子和公共端子之间的至少一个。 电容抑制元件部分减小了电容抑制元件部分连接的半导体开关元件的端子之间的寄生电容小于当电容抑制元件部分未以N倍的频率连接时获得的寄生电容（N为 1或更高）与脉冲状信号的时钟频率一样高。