Computer system, method of managing PCI switch, and management server
    1.
    发明授权
    Computer system, method of managing PCI switch, and management server 失效
    计算机系统,PCI交换机管理方法和管理服务器

    公开(公告)号:US08533381B2

    公开(公告)日:2013-09-10

    申请号:US12709405

    申请日:2010-02-19

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4022 G06F9/4411

    摘要: It is provided a computer system including computers, PCI switches each having first and second ports, a switch management module and a power control module. The switch management module includes an identifying module for identifying a first port coupled to the computer to be booted up, and notifying the PCI switch of the first port, an instruction module for instructing the power control module to boot up the computer, and an allocation management module for managing allocation of one of the I/O device to the computer and notifying the one of the PCI switches of the allocation after the computer is booted up. The PCI switches includes a preventing control module for preventing the computer from detecting a configuration of the first port, and a virtual switch generating module for generating a virtual switch that couples the first port and the second port based on the notification.

    摘要翻译: 提供了一种计算机系统,包括计算机,每个具有第一和第二端口的PCI开关,开关管理模块和电源控制模块。 交换机管理模块包括识别模块,用于识别耦合到要启动的计算机的第一端口,并通知第一端口的PCI交换机,用于指示电源控制模块引导计算机的指令模块以及分配 管理模块,用于管理其中一个I / O设备到计算机的分配,并在计算机启动后通知PCI交换机中的一个分配。 PCI交换机包括用于防止计算机检测第一端口的配置的防止控制模块,以及用于基于通知生成耦合第一端口和第二端口的虚拟交换机的虚拟交换机生成模块。

    Computer system for sharing I/O device
    2.
    发明授权
    Computer system for sharing I/O device 有权
    用于共享I / O设备的计算机系统

    公开(公告)号:US07890669B2

    公开(公告)日:2011-02-15

    申请号:US11561557

    申请日:2006-11-20

    IPC分类号: G06F13/28

    CPC分类号: G06F13/385

    摘要: Provided is a computer system in which an I/O card is shared among physical servers and logical servers. Servers are set in advance such that one I/O card is used exclusively by one physical or logical server, or shared among a plurality of servers. An I/O hub allocates a virtual MM I/O address unique to each physical or logical server to a physical MM I/O address associated with each I/O card. The I/O hub keeps allocation information indicating the relation between the allocated virtual MM I/O address, the physical MM I/O address, and a server identifier unique to each physical or logical server. When a request to access an I/O card is sent from a physical or logical server, the allocation information is referred to and a server identifier is extracted from the access request. The extracted server identifier is used to identify the physical or logical server that has made the access request.

    摘要翻译: 提供了在物理服务器和逻辑服务器之间共享I / O卡的计算机系统。 服务器预先设置,使得一个I / O卡由一个物理或逻辑服务器专门使用,或者在多个服务器之间共享。 I / O集线器将每个物理或逻辑服务器唯一的虚拟MM I / O地址分配给与每个I / O卡相关联的物理MM I / O地址。 I / O集线器保持指示分配的虚拟MM I / O地址,物理MM I / O地址与每个物理或逻辑服务器唯一的服务器标识之间的关系的分配信息。 当从物理或逻辑服务器发送访问I / O卡的请求时,参考分配信息并从访问请求中提取服务器标识符。 提取的服务器标识符用于标识已进行访问请求的物理或逻辑服务器。

    COMPUTER SYSTEM, METHOD OF MANAGING PCI SWITCH, AND MANAGEMENT SERVER
    3.
    发明申请
    COMPUTER SYSTEM, METHOD OF MANAGING PCI SWITCH, AND MANAGEMENT SERVER 失效
    计算机系统,PCI开关管理方法和管理服务器

    公开(公告)号:US20100211717A1

    公开(公告)日:2010-08-19

    申请号:US12709405

    申请日:2010-02-19

    IPC分类号: G06F13/00 G06F15/177

    CPC分类号: G06F13/4022 G06F9/4411

    摘要: It is provided a computer system including computers, PCI switches each having first and second ports, a switch management module and a power control module. The switch management module includes an identifying module for identifying a first port coupled to the computer to be booted up, and notifying the PCI switch of the first port, an instruction module for instructing the power control module to boot up the computer, and an allocation management module for managing allocation of one of the I/O device to the computer and notifying the one of the PCI switches of the allocation after the computer is booted up. The PCI switches includes a preventing control module for preventing the computer from detecting a configuration of the first port, and a virtual switch generating module for generating a virtual switch that couples the first port and the second port based on the notification.

    摘要翻译: 提供了一种计算机系统,包括计算机,每个具有第一和第二端口的PCI开关,开关管理模块和电源控制模块。 交换机管理模块包括识别模块,用于识别耦合到要启动的计算机的第一端口,并通知第一端口的PCI交换机,用于指示电源控制模块引导计算机的指令模块以及分配 管理模块,用于管理其中一个I / O设备到计算机的分配,并在计算机启动后通知PCI交换机中的一个分配。 PCI交换机包括用于防止计算机检测第一端口的配置的防止控制模块,以及用于基于通知生成耦合第一端口和第二端口的虚拟交换机的虚拟交换机生成模块。

    Virtual machine monitor and multiprocessor sysyem
    4.
    发明申请
    Virtual machine monitor and multiprocessor sysyem 有权
    虚拟机监视器和多处理器系统

    公开(公告)号:US20090138887A1

    公开(公告)日:2009-05-28

    申请号:US12222227

    申请日:2008-08-05

    IPC分类号: G06F9/50

    CPC分类号: G06F9/5077

    摘要: In order to provide an interface of acquiring physical position information of an I/O device on a virtual machine monitor having an exclusive allocation function of the I/O device and optimize allocation of a resource to a virtual server by using the acquired physical position information, a virtual machine monitor includes an interface of allocating a resource in accordance with a given policy (a parameter of determining to which a priority is given in distributing resources) for an I/O device, a CPU NO., and a memory amount request to guest OS. Further, the virtual machine monitor includes an interface of pertinently converting physical position information of the resource allocated by the virtual machine monitor to notice to guest OS.

    摘要翻译: 为了提供在具有I / O设备的排他分配功能的虚拟机监视器上获取I / O设备的物理位置信息的接口,并且通过使用所获取的物理位置信息来优化资源到虚拟服务器的分配 ,虚拟机监视器包括根据给定策略(在分配资源中确定给予哪个优先级的参数)为I / O设备分配资源的接口,CPU号和存储量请求 到客户操作系统。 此外,虚拟机监视器包括适当地转换由虚拟机监视器分配的资源的物理位置信息以通知客户OS的接口。

    Node controller for performing cache coherence control and memory-shared multiprocessor system
    5.
    发明授权
    Node controller for performing cache coherence control and memory-shared multiprocessor system 失效
    用于执行高速缓存一致性控制和内存共享多处理器系统的节点控制器

    公开(公告)号:US06789173B1

    公开(公告)日:2004-09-07

    申请号:US09585390

    申请日:2000-06-02

    IPC分类号: G06F1200

    CPC分类号: G06F12/0813

    摘要: In a multiprocessor system of a main memory shared type having a plurality of nodes connected each other through signal lines; each of the plurality of nodes includes CPUs having caches therein, a main memory, and a node controller for performing communication control between the CPUs, main memory and ones of the nodes other than its own node. The node controller has a communication controller for controlling communication interface between the plurality of nodes, a crossbar for determining a processing sequence of memory access issued from at least one of the plurality of nodes to be directed to the main memories of the plurality of nodes, and crossbar controller for making valid or invalid the crossbar.

    摘要翻译: 在具有通过信号线彼此连接的多个节点的主存储器共享类型的多处理器系统中; 所述多个节点中的每一个包括其中具有高速缓存的CPU,主存储器和节点控制器,用于执行CPU,主存储器以及除了其自身节点之外的节点之间的通信控制。 节点控制器具有用于控制多个节点之间的通信接口的通信控制器,用于确定从多个节点中的至少一个节点发出的指向多个节点的主存储器的存储器访问的处理顺序的交叉开关, 和横杆控制器使横梁有效或无效。

    Method for initializing and shutting down a computer system
    6.
    发明授权
    Method for initializing and shutting down a computer system 有权
    初始化和关闭计算机系统的方法

    公开(公告)号:US06643771B2

    公开(公告)日:2003-11-04

    申请号:US10207953

    申请日:2002-07-31

    IPC分类号: G06F924

    CPC分类号: G06F15/177 G06F9/4405

    摘要: In a computer system comprising a plurality of computers interconnected by a network, the following steps are implemented: checking the booting of the individual computers when their power is turned on, checking the available memory space and I/O volumes on the individual computers, and determining a schedule of interleaving the memory and the I/O components. Thereby, the invention provides a multiprocessor system operating with shared memory units in a multiplex manner. In a computer system comprising elemental servers (each functioning as a single server unit and has an SSP) and a network interconnecting the servers. The SSP in conjunction with a chip set provides means for communication through control packets transmitted over the network. The SSP controls the components of the elemental server including the power supply unit. By setting a schedule of interleaving the memory and the I/O components across the plurality of servers, a multiprocessor system operating with shared memory units in a multiplex manner.

    摘要翻译: 在包括由网络互连的多个计算机的计算机系统中,实现以下步骤:检查各个计算机在其接通电源时的引导,检查各个计算机上的可用存储器空间和I / O卷,以及 确定交错存储器和I / O组件的时间表。 因此,本发明提供了以多路复用方式与共享存储器单元一起操作的多处理器系统。 在包括基本服务器(每个用作单个服务器单元并具有SSP)的计算机系统中以及互连该服务器的网络。 SSP与芯片组一起提供了通过网络传输的控制数据包进行通信的手段。 SSP控制包括电源单元在内的元件服务器的组件。 通过设置跨多个服务器交织存储器和I / O组件的调度表,以多路复用方式以共享存储器单元操作的多处理器系统。

    Shared memory multiprocessor performing cache coherence control and node controller therefor
    7.
    发明授权
    Shared memory multiprocessor performing cache coherence control and node controller therefor 失效
    共享内存多处理器执行高速缓存一致性控制和节点控制器

    公开(公告)号:US06636926B2

    公开(公告)日:2003-10-21

    申请号:US09740816

    申请日:2000-12-21

    IPC分类号: G06F1300

    摘要: Each node includes a node controller for decoding the control information and the address information for the access request issued by a processor or an I/O device, generating, based on the result of decoding, the cache coherence control information indicating whether the cache coherence control is required or not, the node information and the unit information for the transfer destination, and adding these information to the access request. An intra-node connection circuit for connecting the units in the node controller holds the cache coherence control information, the node information and the unit information added to the access request. When the cache coherence control information indicates that the cache coherence control is not required and the node information indicates the local node, then the intra-node connection circuit transfers the access request not to the inter-node connection circuit interconnecting the nodes but directly to the unit designated by the unit information.

    摘要翻译: 每个节点包括用于解码由处理器或I / O设备发出的访问请求的控制信息和地址信息的节点控制器,基于解码结果生成指示高速缓存一致性控制的高速缓存一致性控制信息 是否需要节点信息和传输目的地的单位信息,并将这些信息添加到访问请求。 用于连接节点控制器中的单元的节点内连接电路保持高速缓存一致性控制信息,节点信息和添加到访问请求的单元信息。 当高速缓存一致性控制信息指示不需要高速缓存一致性控制并且节点信息指示本地节点时,节点内连接电路不是将互连节点的节点间连接电路的访问请求传送到节点间连接电路,而是直接连接到 单位由单位信息指定。

    Virtual machine monitor and multiprocessor system
    8.
    发明授权
    Virtual machine monitor and multiprocessor system 有权
    虚拟机监控和多处理器系统

    公开(公告)号:US08819675B2

    公开(公告)日:2014-08-26

    申请号:US12222227

    申请日:2008-08-05

    IPC分类号: G06F9/455 G06F9/46 G06F9/50

    CPC分类号: G06F9/5077

    摘要: In order to provide an interface of acquiring physical position information of an I/O device on a virtual machine monitor having an exclusive allocation function of the I/O device and optimize allocation of a resource to a virtual server by using the acquired physical position information, a virtual machine monitor includes an interface of allocating a resource in accordance with a given policy (a parameter of determining to which a priority is given in distributing resources) for an I/O device, a CPU NO., and a memory amount request to guest OS. Further, the virtual machine monitor includes an interface of pertinently converting physical position information of the resource allocated by the virtual machine monitor to notice to guest OS.

    摘要翻译: 为了提供在具有I / O设备的排他分配功能的虚拟机监视器上获取I / O设备的物理位置信息的接口,并且通过使用所获取的物理位置信息来优化资源到虚拟服务器的分配 ,虚拟机监视器包括根据给定策略(在分配资源中确定给予哪个优先级的参数)为I / O设备分配资源的接口,CPU号和存储量请求 到客户操作系统。 此外,虚拟机监视器包括适当地转换由虚拟机监视器分配的资源的物理位置信息以通知客户OS的接口。

    Compound computer system and method for sharing PCI devices thereof
    9.
    发明授权
    Compound computer system and method for sharing PCI devices thereof 有权
    用于共享其PCI设备的复合计算机系统和方法

    公开(公告)号:US08046520B2

    公开(公告)日:2011-10-25

    申请号:US12635755

    申请日:2009-12-11

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4022

    摘要: A resource management module of a management server for controlling a multi-root I/O manager connected to a PCI switch for connecting a plurality of I/O devices and a plurality of computers with each other includes: failure handling content information indicating, for each computer sharing a multi-root I/O device, a content of a failure handling at an occurrence of a failure in the multi-root I/O device; and failure handling availability status information indicating whether a hardware reset of the multi-root I/O device is possible and updates, upon reception of a notification of the occurrence of the failure in the multi-root I/O device, the failure handling availability status information, and instructs, based on the failure handling availability status information, the multi-root I/O manager to restrain or cancel the hardware reset of the multi-root I/O device.

    摘要翻译: 用于控制连接到用于连接多个I / O设备和多个计算机的PCI交换机的多根I / O管理器的管理服务器的资源管理模块包括:故障处理内容信息,指示每个 计算机共享多根I / O设备,在多根I / O设备发生故障时进行故障处理的内容; 以及指示多根I / O设备的硬件复位是否可能的故障处理可用性状态信息,并且在接收到多根I / O设备中发生故障的通知时更新故障处理可用性 状态信息,并指示基于故障处理可用性状态信息,多根I / O管理器来限制或取消多根I / O设备的硬件复位。

    Multiprocessor system and methods for transmitting memory access transactions for the same

    公开(公告)号:US06389518B1

    公开(公告)日:2002-05-14

    申请号:US09523737

    申请日:2000-03-13

    IPC分类号: G06F1200

    摘要: In a multiprocessor arranged in accordance with either NUMA or UMA in which a plurality of processor nodes containing a plurality of processor units are coupled to each other via a network, a cache snoop operation executed in connection with a memory access operation is performed at two stages, namely, local snoop operation executed within a node, and global snoop operation among nodes. Before executing the local snoop operation, an ACTV command for specifying only an RAS of a memory is issued to a target node having a memory to be accessed, and the memory access is activated in advance. A CAS of a memory is additionally specified and a memory access is newly executed after the ACTV command has been issued and then a memory access command has been issued. When there is such a possibility that a memory to be accessed is cached in a processor node except for a source node, this memory access command is issued to be distributed to all nodes so as to execute the global snoop operation. On the other hand, when there is no possibility that the memory to be accessed is cached, this memory access command is transferred only to the target node in yan one-to-one correspondence.