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公开(公告)号：US5432494A
公开(公告)日：1995-07-11
申请号：US67232
申请日：1993-05-26
申请人： Keizou Inoue , Masaaki Kanae , Yoshifumi Ogiso , Takuji Nakagawa
发明人： Keizou Inoue , Masaaki Kanae , Yoshifumi Ogiso , Takuji Nakagawa
摘要： A magnetoresistance element includes an insulating substrate, a patterned magnetoresistance film of a ferromagnetic material deposited thereon and having a uniaxis magnetic anisotropy, and a patterned hard biasing layer of a ferromagnetic material deposited on the substrate. The biasing layer is divided into two parts on both sides of the magnetoresistance layer and magnetized in the direction parallel to a line which intersects the easy direction of magnetization of the patterned magnetoresistance layer at an acute angle (.theta.).
摘要翻译： 磁阻元件包括绝缘衬底，沉积在其上并具有单轴磁各向异性的铁磁材料的图案化磁阻膜，以及沉积在衬底上的铁磁材料的图案化的硬偏置层。 偏置层在磁阻层的两侧被分成两部分，并且以与锐角（θ）的图案化磁阻层的容易磁化方向相交的线平行的方向被磁化。
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公开(公告)号：US06501182B2
公开(公告)日：2002-12-31
申请号：US09888951
申请日：2001-06-25
IPC分类号： H01L2940
CPC分类号： H01L23/66 , H01L23/3677 , H01L23/481 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes an element formed on a first surface of a semiconductor substrate, a via-hole passing through the semiconductor substrate from the first surface to a second surface of the semiconductor substrate, and an electrode formed on the inner wall of the via-hole, the electrode passing through the semiconductor substrate from the first surface to the second surface. The electrode in the via-hole is electrically connected to at least one electrode of the element; the semiconductor substrate is mounted on a surface mount board; and the electrode formed on the inner wall of the via-hole is electrically connected to an electrode of the surface mount board by a conductive bonding material, such as a conductive adhesive. A method for fabricating the semiconductor device is also disclosed.
摘要翻译： 半导体器件包括形成在半导体衬底的第一表面上的元件，从半导体衬底的第一表面到第二表面通过半导体衬底的通孔，以及形成在通孔的内壁上的电极， 所述电极通过所述半导体衬底从所述第一表面到所述第二表面。 通孔中的电极电连接到元件的至少一个电极; 半导体衬底安装在表面安装板上; 并且形成在通孔的内壁上的电极通过诸如导电粘合剂的导电接合材料电连接到表面安装板的电极。 还公开了制造半导体器件的方法。
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公开(公告)号：US06621149B2
公开(公告)日：2003-09-16
申请号：US10072679
申请日：2002-02-08
申请人： Masaaki Kanae
发明人： Masaaki Kanae
IPC分类号： H01L2904
CPC分类号： H01L21/78 , H01L21/3043
摘要： A semiconductor chip production method in which, when a semiconductor chip is formed by severing from a semiconductor wafer, a short side of a semiconductor device is arranged and disposed along a direction which is parallel to a crystal orientation direction, and a severing area along the short side of the semiconductor device is formed so that its width is smaller than the width of a severing area along a long side of the semiconductor device. Further, the widths of the severing areas along the long and short sides of the semiconductor devices are formed so that after severing, the ratio between the long sides and the short sides of the semiconductor chips is smaller than the ratio between the long sides and the short sides of the unseparated semiconductor devices. The invention aims at preventing a reduction in the mechanical strength of a rectangular semiconductor chip having vertical and horizontal dimensions that are different from each other, when producing the rectangular semiconductor chip.
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