公开(公告)号：US20090053849A1

公开(公告)日：2009-02-26

申请号：US12259347

申请日：2008-10-28

申请人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

发明人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

IPC分类号： H01L31/18

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

摘要： A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.

摘要翻译： 光电转换装置包括第一导电类型的第一半导体区域; 与第一半导体区域的一部分一起用作光电转换元件的第二导电类型的第二半导体区域; 将在所述光电转换元件中产生的载流子转移到所述第二导电类型的第三半导体区域的栅电极。 此外，光电转换装置包括用于将第二半导体区域与邻近第二半导体区域的第二导电类型的第四半导体区域电隔离的隔离区域。 用于向栅电极施加电压的布线设置在隔离区上。 这里，在第四半导体区域和隔离区域之间设置具有比第四半导体区域低的杂质浓度的第二导电类型的第五半导体区域。

公开(公告)号：US07459760B2

公开(公告)日：2008-12-02

申请号：US11767779

申请日：2007-06-25

申请人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

发明人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

IPC分类号： H01L29/78

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

摘要： A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.

摘要翻译： 光电转换装置包括第一导电类型的第一半导体区域; 与第一半导体区域的一部分一起用作光电转换元件的第二导电类型的第二半导体区域; 将在所述光电转换元件中产生的载流子转移到所述第二导电类型的第三半导体区域的栅电极。 此外，光电转换装置包括用于将第二半导体区域与邻近第二半导体区域的第二导电类型的第四半导体区域电隔离的隔离区域。 用于向栅电极施加电压的布线设置在隔离区上。 这里，在第四半导体区域和隔离区域之间设置具有比第四半导体区域低的杂质浓度的第二导电类型的第五半导体区域。

公开(公告)号：US07749790B2

公开(公告)日：2010-07-06

申请号：US12259347

申请日：2008-10-28

申请人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

发明人： Ken-ichiro Ura ,  Yoshihiko Fukumoto ,  Yuzo Kataoka

IPC分类号： H01L21/00

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14689

摘要： A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.

摘要翻译： 光电转换装置包括第一导电类型的第一半导体区域; 与第一半导体区域的一部分一起用作光电转换元件的第二导电类型的第二半导体区域; 将在所述光电转换元件中产生的载流子转移到所述第二导电类型的第三半导体区域的栅电极。 此外，光电转换装置包括用于将第二半导体区域与邻近第二半导体区域的第二导电类型的第四半导体区域电隔离的隔离区域。 用于向栅电极施加电压的布线设置在隔离区上。 这里，在第四半导体区域和隔离区域之间设置具有比第四半导体区域低的杂质浓度的第二导电类型的第五半导体区域。

公开(公告)号：US20100053294A1

公开(公告)日：2010-03-04

申请号：US12546190

申请日：2009-08-24

申请人： Yoshihiko Fukumoto

发明人： Yoshihiko Fukumoto

IPC分类号： B41J2/34

CPC分类号： B41J2/3353 ,  B41J2/33535

摘要： The present invention provides a thermal head with increased contact pressure between a heat generating portion and a printing medium to increase printing quality with a low heat loss. A thermal head includes: a plurality of heat generating resistors formed via an insulating layer; a driver circuit unit for driving the plurality of heat generating resistors to generate a heat; a wiring for connecting the driver circuit unit to the plurality of heat generating resistors; a protecting film formed to cover the plurality of heat generating resistors, the driver circuit unit and the wiring, wherein the plurality of heat generating resistors, the driver circuit unit, the wiring and the protecting film are formed on a substrate, and a thermal insulating layer having a thermal conductivity smaller than 0.5 W/m·K and having a maximum thickness of larger than 10 μm is provided between the heat generating resistor and the substrate.

摘要翻译： 本发明提供了一种具有增加的发热部分和打印介质之间的接触压力的热敏头，以便以低热损失提高打印质量。 热敏头包括：通过绝缘层形成的多个发热电阻器; 用于驱动多个发热电阻器以产生热量的驱动器电路单元; 用于将驱动器电路单元连接到多个发热电阻器的布线; 形成为覆盖多个发热电阻器，驱动电路单元和布线的保护膜，其中，多个发热电阻器，驱动电路单元，布线和保护膜形成在基板上，并且绝热 在发热电阻体和基板之间设置热导率小于0.5W / m·K且最大厚度大于10μm的层。

公开(公告)号：US5933204A

公开(公告)日：1999-08-03

申请号：US671373

申请日：1996-06-27

申请人： Yoshihiko Fukumoto

发明人： Yoshihiko Fukumoto

IPC分类号： G02F1/136 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/336 ,  H01L29/786 ,  G02F1/13 ,  G02F1/1333

CPC分类号： G02F1/133553 ,  G02F1/136277 ,  G02F2001/13373 ,  G02F2001/136281 ,  G02F2201/48

摘要： Disclosed herein is a method of producing a display device comprising a substrate and a plurality of conductive members provided on the substrate, said conductive members each having a substantially even surface and making up pixels, wherein the conductive members are smoothed by means of chemical mechanical polishing.

摘要翻译： 本文公开了一种制造显示装置的方法，其包括基板和设置在基板上的多个导电构件，所述导电构件各自具有基本上均匀的表面和构成像素，其中通过化学机械抛光使导电构件平滑化 。

公开(公告)号：US6122766A

公开(公告)日：2000-09-19

申请号：US951525

申请日：1997-10-16

申请人： Toshihiko Fukuoka ,  Yoshihiko Fukumoto ,  Kazuhiro Ohta

发明人： Toshihiko Fukuoka ,  Yoshihiko Fukumoto ,  Kazuhiro Ohta

IPC分类号： G06F11/10 ,  H03M13/00 ,  H03M13/15

CPC分类号： H03M13/1535 ,  H03M13/151 ,  H03M13/1555 ,  H03M13/158 ,  H03M13/1515

摘要： A syndrome calculation unit 101 forming a first pipeline stage, a Euclidean algorithm arithmetic operation/error value calculation unit 102 and a Chien search unit 103 together forming a second pipeline stage, and an error correction unit 105 forming a third pipeline stage are provided. The unit 102 implements, by iterative use of a single inverse element calculator, a single Galois multiplier, and a single Galois adder, the Euclidean algorithm arithmetic operation of finding an error locator polynomial .sigma.(z) and an error evaluator polynomial .omega.(z) from a syndrome polynomial S(z) and the calculation of finding an error value e.sub.u by dividing an error evaluation value .omega.(.alpha..sup.-ju) by an error locator polynomial differential value .sigma.'(.alpha..sup.-ju).

摘要翻译： 提供了形成第一流水线级的校正子计算单元101，一起形成第二流水线级的欧几里德算法运算/误差值计算单元102和Chien搜索单元103以及形成第三流水线级的纠错单元105。 单元102通过迭代使用单个逆元素计算器来实现单个伽罗瓦乘法器和单个伽罗瓦加法器，找到误差定位多项式σ（z）和误差估计器多项式ω（z）的欧几里德算法运算， 通过校正子多项式S（z）和通过将误差评估值ω（α-ju）除以误差定位多项式微分值sigma'（α-ju）来求出误差值eu的计算。

公开(公告)号：US08471301B2

公开(公告)日：2013-06-25

申请号：US12963350

申请日：2010-12-08

申请人： Masanori Kudo ,  Yoshiyuki Hayashi ,  Kazuhiro Saito ,  Taro Kato ,  Yoshihiko Fukumoto

发明人： Masanori Kudo ,  Yoshiyuki Hayashi ,  Kazuhiro Saito ,  Taro Kato ,  Yoshihiko Fukumoto

IPC分类号： H01L31/0236

CPC分类号： H01L27/1462 ,  H01L27/14621 ,  H01L27/1463

摘要： A device includes a plurality of photoelectric conversion regions, an interlayer insulating film arranged on the plurality of photoelectric conversion regions, a protective insulating film that is arranged in contact with the interlayer insulating film and has a refractive index different from that of the interlayer insulating film, recesses arranged in a light-receiving surface of each of the plurality of photoelectric conversion regions, and embedded regions embedded in the recesses. When a wavelength of incident light to each of the plurality of photoelectric conversion regions is denoted by λ and a refractive index of the embedded regions is denoted by n, a depth d of the recesses is represented by an expression d≧λ/4n.

摘要翻译： 一种器件包括多个光电转换区域，布置在多个光电转换区域上的层间绝缘膜，与层间绝缘膜接触并具有与层间绝缘膜的折射率不同的折射率的保护绝缘膜 布置在多个光电转换区域的每一个的光接收表面中的凹槽以及嵌入凹槽中的嵌入区域。 当以λ表示对多个光电转换区域中的每一个的入射光的波长，并且将嵌入区域的折射率表示为n时，凹坑的深度d由表达式d> =λ/ 4n表示。

公开(公告)号：US20080094132A1

公开(公告)日：2008-04-24

申请号：US11660315

申请日：2006-02-14

申请人： Takashi Kakemizu ,  Yoshihiko Fukumoto

发明人： Takashi Kakemizu ,  Yoshihiko Fukumoto

IPC分类号： G05F1/00

CPC分类号： H01L21/823481 ,  H01L21/761 ,  H01L27/0203

摘要： Between an analog circuit area 120 which includes circuits whose characteristics are degraded according to the level of noise contained in an input signal and a digital circuit area 130 which includes circuits that produce noise at such a level that the characteristics of the circuits in the analog circuit area 120 are caused to degrade, a digital circuit area 140 which only includes circuits that produce noise at such a level that the characteristics of the circuits in the analog circuit area 120 are not caused to degrade (or are caused to degrade within their acceptable limits) is located so as to prevent contact between the analog circuit area 120 and the digital circuit area 130.

摘要翻译： 在包括根据输入信号中包含的噪声的电平劣化的电路的模拟电路区域120和数字电路区域130之间，该数字电路区域130包括产生噪声的电路，该电平使得模拟电路中的电路的特性 导致区域120降级的数字电路区域140，其仅包括产生噪声的电路，使得模拟电路区域120中的电路的特性不会降级（或者在其可接受的限度内被降级） ）被定位成防止模拟电路区域120和数字电路区域130之间的接触。

公开(公告)号：US6157429A

公开(公告)日：2000-12-05

申请号：US953730

申请日：1997-10-17

申请人： Mamoru Miyawaki ,  Katsumi Kurematsu ,  Osamu Koyama ,  Yoshihiko Fukumoto ,  Toru Nakazawa

发明人： Mamoru Miyawaki ,  Katsumi Kurematsu ,  Osamu Koyama ,  Yoshihiko Fukumoto ,  Toru Nakazawa

IPC分类号： G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1362 ,  G09F9/35 ,  G02F1/1339

CPC分类号： G02F1/133526 ,  G02F1/136277 ,  G02F1/133512 ,  G02F1/133553 ,  G02F2001/133357 ,  G02F2201/48

摘要： A matrix substrate comprises a pixel region formed by arranging a plurality of pixel electrodes to a matrix, drive circuit regions for feeding said pixel electrodes with electric signals and sealing regions. The gaps separating the pixel electrodes are filled with insulation members of an insulating material to provide a continuous surface connecting those of the pixel electrodes and members of the material of the pixel electrodes and those of the material of the insulation members are arranged at least either in the drive circuit regions or in the sealing regions to provide a continuous surface there.

摘要翻译： 矩阵基板包括通过将多个像素电极布置到矩阵而形成的像素区域，用于将电信号和密封区域馈送给所述像素电极的驱动电路区域。 分离像素电极的间隙填充有绝缘材料的绝缘构件，以提供连接像素电极和像素电极的材料的连续表面，绝缘构件的材料的至少一个布置在 驱动电路区域或密封区域中提供连续表面。

公开(公告)号：US5539403A

公开(公告)日：1996-07-23

申请号：US185876

申请日：1994-06-06

申请人： Yasunori Tani ,  Tetsuhiko Kaneaki ,  Akira Sobajima ,  Hideaki Hatanaka ,  Yoshihiko Fukumoto

发明人： Yasunori Tani ,  Tetsuhiko Kaneaki ,  Akira Sobajima ,  Hideaki Hatanaka ,  Yoshihiko Fukumoto

IPC分类号： H03M1/06 ,  H03M1/66 ,  H03M1/68 ,  H03M3/04

CPC分类号： H03M1/0663 ,  H03M1/682 ,  H03M1/74 ,  H03M3/464 ,  H03M3/502 ,  H03M7/3022

摘要： It purposes to provide a D/A conversion apparatus of a high accuracy oversampling method by noise shaping which is not needed a high frequency clock or accurate working, and a high accuracy A/D conversion apparatus having a configuration to which said D/A conversion technology is applied. It has configuration outputting the digital signal by dividing to plural 1-bit D/A converters, and by using said D/A converters so as to circulate, correlation of the signal and the output value of a specified 1-bit D/A converter is canceled, and noise or distortion due to a relative error of the 1-bit D/A converter is reduced.

摘要翻译： PCT No.PCT / JP93 / 00717 Sec。 371日期1994年1月6日 102（e）日期1994年1月6日PCT提交1993年5月28日PCT公布。 公开号WO93 / 25006 日期为1993年12月9日为了提供高精度过采样方法的D / A转换装置，其不需要高频时钟或精确工作的噪声整形，以及具有以下结构的高精度A / D转换装置： 表示应用D / A转换技术。 它具有通过分配多个1位D / A转换器来输出数字信号的配置，并且通过使用所述D / A转换器来循环信号与指定的1位D / A转换器的输出值的相关性 被消除，并且由于1位D / A转换器的相对误差引起的噪声或失真减少。