摘要:
Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the first side. The substrate has a pixel region and a periphery region. The image sensor device includes a plurality of radiation-sensing regions disposed in the pixel region of the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes a reference pixel disposed in the periphery region. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers. The image sensor device includes a film formed over the back side of the substrate. The film causes the substrate to experience a tensile stress. The image sensor device includes a radiation-blocking device disposed over the film.
摘要:
An image sensor includes a semiconductor substrate, a guard ring structure in the substrate, and at least one pixel surrounded by the guard ring structure. The guard ring structure is implanted in the substrate by high-energy implantation.
摘要:
A backside illuminated image sensor includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.
摘要:
Embodiments of the invention relate to dual shallow trench isolations (STI). In various embodiments related to CMOS Image Sensor (CIS) technologies, the dual STI refers to one STI structure in the pixel region and another STI structure in the periphery or logic region. The depth of each STI structure depends on the need and/or isolation tolerance of devices in each region. In an embodiment, the pixel region uses NMOS devices and the STI in this region is shallower than that of in the periphery region that includes both NMOS and PMOS device having different P- and N-wells and that desire more protective isolation (i.e., deeper STI). Depending on implementations, different numbers of masks (e.g., two, three) are used to generate the dual STI, and are disclosed in various method embodiments.