公开(公告)号：US09013022B2

公开(公告)日：2015-04-21

申请号：US13198111

申请日：2011-08-04

申请人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

发明人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

IPC分类号： H01L31/00 ,  H01L23/00 ,  H01L23/48 ,  H01L27/146 ,  H01L21/768 ,  H01L23/525

CPC分类号： H01L27/14636 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L27/14623 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/14685 ,  H01L27/14689 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/11916 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/83359 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： An integrated circuit structure includes a semiconductor substrate, and a dielectric pad extending from a bottom surface of the semiconductor substrate up into the semiconductor substrate. A low-k dielectric layer is disposed underlying the semiconductor substrate. A first non-low-k dielectric layer is underlying the low-k dielectric layer. A metal pad is underlying the first non-low-k dielectric layer. A second non-low-k dielectric layer is underlying the metal pad. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate, the dielectric pad, and the low-k dielectric layer, wherein the opening lands on a top surface of the metal pad. A passivation layer includes a portion on a sidewall of the opening, wherein a portion of the passivation layer at a bottom of the opening is removed.

摘要翻译： 集成电路结构包括半导体衬底和从半导体衬底的底表面延伸到半导体衬底中的介质衬垫。 低k电介质层设置在半导体衬底下方。 第一个非低k电介质层位于低k电介质层的下面。 金属焊盘位于第一非低k电介质层的下面。 第二个非低k电介质层位于金属焊盘的下方。 开口从半导体衬底的顶表面向下延伸以穿透半导体衬底，电介质衬垫和低k电介质层，其中，开口焊接在金属衬垫的顶表面上。 钝化层包括在开口的侧壁上的部分，其中去除开口底部的钝化层的一部分。

公开(公告)号：US08946849B2

公开(公告)日：2015-02-03

申请号：US13592124

申请日：2012-08-22

申请人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Feng-Chi Hung

发明人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Feng-Chi Hung

IPC分类号： H01L21/00 ,  H01L27/146

CPC分类号： H01L27/1464 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14687

摘要： A device includes a semiconductor substrate having a front side and a backside. A plurality of image sensors is disposed at the front side of the semiconductor substrate. A plurality of clear color-filters is disposed on the backside of the semiconductor substrate. A plurality of metal rings encircles the plurality of clear color-filters.

摘要翻译： 一种器件包括具有正面和背面的半导体衬底。 多个图像传感器设置在半导体衬底的前侧。 多个透明滤色器设置在半导体衬底的背面。 多个金属环围绕多个透明滤色器。

公开(公告)号：US20130285179A1

公开(公告)日：2013-10-31

申请号：US13457301

申请日：2012-04-26

申请人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Feng-Chi Hung ,  Shuang-Ji Tsai

发明人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Feng-Chi Hung ,  Shuang-Ji Tsai

IPC分类号： H01L31/0232 ,  H01L31/18

CPC分类号： H01L27/14685 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14629 ,  H01L27/1464 ,  H01L27/14689

摘要： A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment a first color filter is formed over a first photosensitive diode and a second color filter is formed over a second photosensitive diode, and a gap is formed between the first color filter and the second color filter. The gap will serve to reflect light that otherwise would have crossed from the first color filter to the second color filter, thereby reducing cross-talk between the first photosensitive diode and the second photosensitive diode. A reflective grid may also be formed between the first photosensitive diode and the second photosensitive diode in order to assist in the reflection and further reduce the amount of cross-talk.

摘要翻译： 提供了一种用于减少感光二极管之间串扰的系统和方法。 在一个实施例中，在第一感光二极管上形成第一滤色器，并且在第二感光二极管上形成第二滤色器，并且在第一滤色器和第二滤色器之间形成间隙。 间隙将用于反射否则将从第一滤色器过渡到第二滤色器的光，从而减少第一光敏二极管和第二感光二极管之间的串扰。 也可以在第一感光二极管和第二感光二极管之间形成反射栅格，以帮助反射并进一步减少串扰量。

公开(公告)号：US08531565B2

公开(公告)日：2013-09-10

申请号：US12710862

申请日：2010-02-23

申请人： Wen-De Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Jeng-Shyan Lin

发明人： Wen-De Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Jeng-Shyan Lin

IPC分类号： H04N5/335 ,  H04N5/217

CPC分类号： H01L31/02005 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/14698 ,  H01L31/18

摘要： An image sensor includes a semiconductor substrate, a guard ring structure in the substrate, and at least one pixel surrounded by the guard ring structure. The guard ring structure is implanted in the substrate by high-energy implantation.

摘要翻译： 图像传感器包括半导体衬底，衬底中的保护环结构和由保护环结构包围的至少一个像素。 保护环结构通过高能量注入植入衬底。

公开(公告)号：US20130032920A1

公开(公告)日：2013-02-07

申请号：US13198057

申请日：2011-08-04

申请人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

发明人： Jeng-Shyan Lin ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Shuang-Ji Tsai ,  Yueh-Chiou Lin

IPC分类号： H01L27/146 ,  H01L31/18 ,  H01L31/02

CPC分类号： H01L27/14687 ,  H01L27/1463 ,  H01L27/14636 ,  H01L27/1464

摘要： An image sensor device includes a semiconductor substrate having a front side and a backside. A first dielectric layer is on the front side of the semiconductor substrate. A metal pad is in the first dielectric layer. A second dielectric layer is over the first dielectric layer and on the front side of the semiconductor substrate. An opening penetrates through the semiconductor substrate from the backside of the semiconductor substrate, wherein the opening includes a first portion extending to expose a portion of the metal pad and a second portion extending to expose a portion of the second dielectric layer. A metal layer is formed in the first portion and the second portion of the opening.

公开(公告)号：US20120292730A1

公开(公告)日：2012-11-22

申请号：US13112755

申请日：2011-05-20

申请人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang ,  Yueh-Chiou Lin

发明人： Shuang-Ji Tsai ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang ,  Yueh-Chiou Lin

IPC分类号： H01L27/146 ,  H01L31/18 ,  H01L31/0224

CPC分类号： H01L23/5226 ,  H01L21/76898 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14689 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers.

摘要翻译： 一种半导体器件，包括具有正面和背面的器件基板。 半导体器件还包括设置在器件基板的前侧的互连结构，该互连结构具有n个金属层。 半导体器件还包括设置在器件衬底的背面上的接合焊盘，焊盘延伸穿过互连结构并直接接触n个金属层的第n个金属层。

公开(公告)号：US08202791B2

公开(公告)日：2012-06-19

申请号：US12404852

申请日：2009-03-16

申请人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang

发明人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang

IPC分类号： H01L21/425

CPC分类号： H01L21/266 ,  H01L21/26513 ,  H01L29/66537

摘要： A method for fabricating an integrated circuit device is disclosed. The method includes providing a substrate; forming a first hard mask layer over the substrate; patterning the first hard mask layer to form one or more first openings having a first critical dimension; performing a first implantation process on the substrate; forming a second hard mask layer over the first hard mask layer to form one or more second openings having a second critical dimension; and performing a second implantation process.

摘要翻译： 公开了一种用于制造集成电路器件的方法。 该方法包括提供基板; 在衬底上形成第一硬掩模层; 图案化第一硬掩模层以形成具有第一临界尺寸的一个或多个第一开口; 在所述基板上执行第一注入工艺; 在所述第一硬掩模层上形成第二硬掩模层以形成具有第二临界尺寸的一个或多个第二开口; 以及执行第二植入过程。

公开(公告)号：US20120038028A1

公开(公告)日：2012-02-16

申请号：US12938272

申请日：2010-11-02

申请人： Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang ,  Shu-Ting Tsai

发明人： Dun-Nian Yaung ,  Jen-Cheng Liu ,  Jeng-Shyan Lin ,  Wen-De Wang ,  Shu-Ting Tsai

IPC分类号： H01L23/02 ,  H01L21/71

CPC分类号： H01L21/78 ,  H01L23/3157 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

摘要： The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures. A semiconductor device fabricated by such a method is also provided.

摘要翻译： 本公开提供一种制造半导体器件的方法，所述方法包括提供具有密封环区域和电路区域的衬底，在所述密封环区域上形成第一密封环结构，在所述密封环上形成第二密封环结构 并且邻近第一密封环结构，以及形成设置在第一和第二密封环结构上的第一钝化层。 还提供了通过这种方法制造的半导体器件。

公开(公告)号：US20110049589A1

公开(公告)日：2011-03-03

申请号：US12820656

申请日：2010-06-22

申请人： Chun-Chieh CHUANG ,  Dun-Nian YAUNG ,  Jen-Cheng LIU ,  Jeng-Shyan LIN ,  Wen-De WANG

发明人： Chun-Chieh CHUANG ,  Dun-Nian YAUNG ,  Jen-Cheng LIU ,  Jeng-Shyan LIN ,  Wen-De WANG

IPC分类号： H01L31/101

CPC分类号： H01L27/1461 ,  H01L27/14609 ,  H01L27/1464 ,  H01L27/14643 ,  H01L28/40

摘要： A backside illuminated image sensor includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element.

摘要翻译： 背面照明图像传感器包括具有前侧和后侧的半导体衬底，形成在半导体衬底的前侧上的传感器元件和形成在传感器元件上的电容器。

公开(公告)号：US20100252870A1

公开(公告)日：2010-10-07

申请号：US12751126

申请日：2010-03-31

申请人： Jeng-Shyan LIN ,  Dun-Nian YAUNG ,  Jen-Cheng LIU ,  Chun-Chieh CHUANG ,  Volume CHIEN

发明人： Jeng-Shyan LIN ,  Dun-Nian YAUNG ,  Jen-Cheng LIU ,  Chun-Chieh CHUANG ,  Volume CHIEN

IPC分类号： H01L27/146 ,  H01L31/18 ,  H01L21/76

CPC分类号： H01L27/1463 ,  H01L21/76229 ,  H01L21/823878 ,  H01L27/14621 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/14689

摘要： Embodiments of the invention relate to dual shallow trench isolations (STI). In various embodiments related to CMOS Image Sensor (CIS) technologies, the dual STI refers to one STI structure in the pixel region and another STI structure in the periphery or logic region. The depth of each STI structure depends on the need and/or isolation tolerance of devices in each region. In an embodiment, the pixel region uses NMOS devices and the STI in this region is shallower than that of in the periphery region that includes both NMOS and PMOS device having different P- and N-wells and that desire more protective isolation (i.e., deeper STI). Depending on implementations, different numbers of masks (e.g., two, three) are used to generate the dual STI, and are disclosed in various method embodiments.

摘要翻译： 本发明的实施例涉及双重浅沟槽隔离（STI）。 在涉及CMOS图像传感器（CIS）技术的各种实施例中，双STI是指像素区域中的一个STI结构和外围或逻辑区域中的另一个STI结构。 每个STI结构的深度取决于每个区域中器件的需要和/或隔离容差。 在一个实施例中，像素区域使用NMOS器件，并且该区域中的STI比包括具有不同P阱和N阱的NMOS和PMOS器件的外围区域中的STI浅，并且需要更多的保护隔离（即，更深的 STI）。 根据实施方案，使用不同数量的掩模（例如，两个，三个）来产生双STI，并且在各种方法实施例中公开。