公开(公告)号：US20060071896A1

公开(公告)日：2006-04-06

申请号：US11226177

申请日：2005-09-14

申请人： Kenichi Nakata ,  Hiroki Takeuchi ,  Mikiya Doi

发明人： Kenichi Nakata ,  Hiroki Takeuchi ,  Mikiya Doi

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/066 ,  G09G2320/0223 ,  G09G2320/0247 ,  G09G2330/028

摘要： A power supply circuit comprising a charge pump circuit supplies a supply voltage to a gate driver. A timing controller supplies a predetermined timing signal to a NAND circuit, a shutdown terminal of the charge pump circuit, and a gate shading circuit including a capacitor, a resistor, a NOT circuit, and a transistor. When this timing signal is high, the charge pump circuit makes a normal operation and the gate shading circuit is deactivated. When this timing signal is low, the charge pump circuit stops operating and the gate shading circuit is activated to drain an electric charge from the output of the charge pump circuit.

摘要翻译： 包括电荷泵电路的电源电路向栅极驱动器提供电源电压。 定时控制器向NAND电路，电荷泵电路的关断端子以及包括电容器，电阻器，NOT电路和晶体管的栅极阴影电路提供预定定时信号。 当该定时信号为高电平时，电荷泵电路进行正常工作，栅极阴影电路被去激活。 当该定时信号为低电平时，电荷泵电路停止工作，栅极阴影电路被激活，从电荷泵电路的输出中排出电荷。

公开(公告)号：US07378825B2

公开(公告)日：2008-05-27

申请号：US11730790

申请日：2007-04-04

申请人： Kenichi Nakata ,  Mikiya Doi

发明人： Kenichi Nakata ,  Mikiya Doi

IPC分类号： G05F1/40

CPC分类号： H02M3/156 ,  H02M2001/0025

摘要： A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

摘要翻译： 提供DC / DC转换器，使得即使当电源电压和负载侧输出的输出设置电压之间的差异大时，也可以获得期望的输出设定电压作为负载侧输出。 该DC / DC转换器包括开关装置，分压器，误差放大器，输出振荡时钟的振荡器，接收振荡时钟的斜坡电路，并输出具有斜率的锯齿波形电压，斜坡开始于 振荡时钟，比较器，其比较锯齿波形电压和误差放大器的输出电压，以及由振荡时钟的后沿设置的逻辑电路，并由比较器的输出复位。

公开(公告)号：US20050052800A1

公开(公告)日：2005-03-10

申请号：US10936802

申请日：2004-09-09

申请人： Mikiya Doi ,  Kenichi Nakata

发明人： Mikiya Doi ,  Kenichi Nakata

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/092 ,  H03F1/52 ,  H03F3/345 ,  H03K19/00 ,  H02H9/00

CPC分类号： H03F1/523 ,  H03F2200/258

摘要： When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.

摘要翻译： 当从缓冲器输出的输出电压接近接地电压时，MOS晶体管截止，从而解除MOS晶体管的栅极的钳位。

公开(公告)号：US07215104B2

公开(公告)日：2007-05-08

申请号：US10869867

申请日：2004-06-18

申请人： Kenichi Nakata ,  Mikiya Doi

发明人： Kenichi Nakata ,  Mikiya Doi

IPC分类号： G05F1/40

CPC分类号： H02M3/156 ,  H02M2001/0025

摘要： A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

摘要翻译： 提供DC / DC转换器，使得即使当电源电压和负载侧输出的输出设置电压之间的差异大时，也可以获得期望的输出设定电压作为负载侧输出。 该DC / DC转换器包括开关装置，分压器，误差放大器，输出振荡时钟的振荡器，接收振荡时钟的斜坡电路，并输出具有斜率的锯齿波形电压，斜坡开始于 振荡时钟，比较器，其比较锯齿波形电压和误差放大器的输出电压，以及由振荡时钟的后沿设置的逻辑电路，并由比较器的输出复位。

公开(公告)号：US07768214B2

公开(公告)日：2010-08-03

申请号：US11816201

申请日：2005-10-21

申请人： Mikiya Doi ,  Kenichi Nakata

发明人： Mikiya Doi ,  Kenichi Nakata

IPC分类号： G05F1/00

CPC分类号： H02M3/1582

摘要： A step-up/step-down regulator circuit wherein a switch has a terminal connected to an end of an inductor, another terminal grounded, and a control terminal connected to an end of a switch. In this way, performing an open/close control of the switch can indirectly perform an open/close control of the switch, thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.

摘要翻译： 一种升压/降压调节器电路，其中开关具有连接到电感器的端部的端子，另一个端子接地，以及连接到开关端部的控制端子。 以这种方式，对开关的开/关控制可以间接地执行开关的开/关控制，从而解决了当升压和升压之间的切换时开关控制电路的结构和操作将变得复杂的问题 实现降压操作。

公开(公告)号：US20090009104A1

公开(公告)日：2009-01-08

申请号：US11816201

申请日：2005-10-21

申请人： Mikiya Doi ,  Kenichi Nakata

发明人： Mikiya Doi ,  Kenichi Nakata

IPC分类号： G05F1/00

CPC分类号： H02M3/1582

摘要： A step-up/step-down regulator circuit wherein a switch (N2) has a terminal connected to an end of an inductor (L1), another terminal grounded, and a control terminal connected to an end of a switch (N1). In this way, performing an open/close control of the switch (N1) can indirectly perform an open/close control of the switch (N2), thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.

摘要翻译： 一种升压/降压调节器电路，其中开关（N2）具有连接到电感器（L1）的端部的端子，另一个端子接地，以及连接到开关（N1）的端部的控制端子。 以这种方式，开关（N1）的开/关控制可以间接地执行开关（N2）的开/关控制，从而解决了当开关控制电路的结构和操作复杂时 实现了升压和降压操作之间的切换。

公开(公告)号：US20070182393A1

公开(公告)日：2007-08-09

申请号：US11730790

申请日：2007-04-04

申请人： Kenichi Nakata ,  Mikiya Doi

发明人： Kenichi Nakata ,  Mikiya Doi

IPC分类号： G05F1/00

CPC分类号： H02M3/156 ,  H02M2001/0025

摘要： A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.

公开(公告)号：US07123045B2

公开(公告)日：2006-10-17

申请号：US10936802

申请日：2004-09-09

申请人： Mikiya Doi ,  Kenichi Nakata

发明人： Mikiya Doi ,  Kenichi Nakata

IPC分类号： H03K17/16 ,  H03K19/003

CPC分类号： H03F1/523 ,  H03F2200/258

摘要： When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.

摘要翻译： 当从缓冲器输出的输出电压接近接地电压时，MOS晶体管截止，从而释放MOS晶体管的栅极的钳位。

公开(公告)号：US20150131350A1

公开(公告)日：2015-05-14

申请号：US14394875

申请日：2012-04-18

申请人： Takuya ISOMURA ,  Takashi HAMATANI ,  Kenichi NAKATA ,  Kazuya MATSUME ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Takuya Isomura ,  Takashi Hamatani ,  Kenichi Nakata ,  Kazuya Matsumi

IPC分类号： H02M1/38 ,  H02M7/537

CPC分类号： H02M1/38 ,  H02M7/537 ,  H02M7/538 ,  H03K17/08128 ,  H03K17/168

摘要： This description relates to an electrical power converter including a series connection of two transistors, and provides a technology for suppressing increase in electrical current flowing through the transistors when the two transistors are turned on at the same time for some defective reason. An electrical power converter disclosed herein includes a series connection of a first transistor and a second transistor. The electrical power converter includes a clamp circuit configured to inhibit an abnormal rise in gate voltage, which is provided in at least either the first transistor or the second transistor. The clamp circuit includes a diode and a capacitor. The diode has an anode connected with a gate of the transistor. The capacitor has one electrode connected with a cathode of the diode and the other electrode connected with an emitter of the transistor.

摘要翻译： 本说明书涉及一种包括两个晶体管的串联连接的电力转换器，并且提供了一种用于在两个晶体管同时导通一些有缺陷的原因时抑制流过晶体管的电流的增加的技术。 本文公开的电力转换器包括第一晶体管和第二晶体管的串联连接。 电力转换器包括钳位电路，其被配置为抑制在至少第一晶体管或第二晶体管中提供的栅极电压的异常上升。 钳位电路包括二极管和电容器。 二极管具有与晶体管的栅极连接的阳极。 电容器具有与二极管的阴极连接的一个电极，而另一个电极与晶体管的发射极连接。

公开(公告)号：US20070236199A1

公开(公告)日：2007-10-11

申请号：US11784874

申请日：2007-04-09

申请人： Kenichi Nakata

发明人： Kenichi Nakata

IPC分类号： G05F1/00

CPC分类号： H02M3/1588 ,  H03K2217/0036 ,  Y02B70/1466

摘要： A step-up DC/DC converter uses N-channel field-effect transistors as both an output transistor and a synchronous-rectification transistor and includes a first driver making the gate voltage of the output transistor pulsate between a ground voltage and an input voltage and a second driver making the gate voltage of the synchronous-rectification transistor pulsate between a switching voltage and a bootstrap voltage equal to the switching voltage plus at least the ON threshold voltage of the synchronous-rectification transistor. With this configuration, the converter opeates with improved power efficiency and performs synchronous rectification unhindered even with a small input-output voltage difference.

摘要翻译： 升压DC / DC转换器使用N沟道场效应晶体管作为输出晶体管和同步整流晶体管，并且包括使得输出晶体管的栅极电压在接地电压和输入电压之间脉动的第一驱动器， 使第二驱动器使同步整流晶体管的栅极电压在开关电压和等于开关电压加上至少同步整流晶体管的导通阈值电压的自举电压之间脉动。 通过这种配置，转换器具有提高的功率效率，并且即使在小的输入 - 输出电压差下也能够不受阻碍地执行同步整流。