摘要:
A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.
摘要:
A power supply circuit comprising a charge pump circuit supplies a supply voltage to a gate driver. A timing controller supplies a predetermined timing signal to a NAND circuit, a shutdown terminal of the charge pump circuit, and a gate shading circuit including a capacitor, a resistor, a NOT circuit, and a transistor. When this timing signal is high, the charge pump circuit makes a normal operation and the gate shading circuit is deactivated. When this timing signal is low, the charge pump circuit stops operating and the gate shading circuit is activated to drain an electric charge from the output of the charge pump circuit.
摘要:
When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.
摘要:
A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.
摘要:
A step-up/step-down regulator circuit wherein a switch has a terminal connected to an end of an inductor, another terminal grounded, and a control terminal connected to an end of a switch. In this way, performing an open/close control of the switch can indirectly perform an open/close control of the switch, thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.
摘要:
A step-up/step-down regulator circuit wherein a switch (N2) has a terminal connected to an end of an inductor (L1), another terminal grounded, and a control terminal connected to an end of a switch (N1). In this way, performing an open/close control of the switch (N1) can indirectly perform an open/close control of the switch (N2), thereby solving the problem that the structure and operation of a switch control circuit will be complicated when the switching between step-up and step-down operation is realized.
摘要:
A DC/DC converter is supplied such that the desired output setting voltage can be obtained as the load-side output, even when the difference between the power supply voltage and the output setting voltage of the load-side output is large. This DC/DC converter comprises a switching device, a voltage divider, an error amplifier, an oscillator which outputs a oscillation clock, a slope circuit which receives the oscillation clock and outputs a sawtooth waveform voltage having a slope which begins at the leading edge of the oscillation clock, a comparator which compares the sawtooth waveform voltage and the output voltage of the error amplifier, and a logic circuit which is set by the trailing edge of the oscillation clock, and is reset by the output of the comparator.
摘要:
When an output voltage output from a buffer approaches a ground voltage, a MOS transistor turns off, so that clamp for a gate of the MOS transistor is released.
摘要:
This description relates to an electrical power converter including a series connection of two transistors, and provides a technology for suppressing increase in electrical current flowing through the transistors when the two transistors are turned on at the same time for some defective reason. An electrical power converter disclosed herein includes a series connection of a first transistor and a second transistor. The electrical power converter includes a clamp circuit configured to inhibit an abnormal rise in gate voltage, which is provided in at least either the first transistor or the second transistor. The clamp circuit includes a diode and a capacitor. The diode has an anode connected with a gate of the transistor. The capacitor has one electrode connected with a cathode of the diode and the other electrode connected with an emitter of the transistor.
摘要:
A step-up DC/DC converter uses N-channel field-effect transistors as both an output transistor and a synchronous-rectification transistor and includes a first driver making the gate voltage of the output transistor pulsate between a ground voltage and an input voltage and a second driver making the gate voltage of the synchronous-rectification transistor pulsate between a switching voltage and a bootstrap voltage equal to the switching voltage plus at least the ON threshold voltage of the synchronous-rectification transistor. With this configuration, the converter opeates with improved power efficiency and performs synchronous rectification unhindered even with a small input-output voltage difference.