-
公开(公告)号：US5553072A
公开(公告)日：1996-09-03
申请号：US380383
申请日：1995-01-30
IPC分类号： H04L12/28 , H04L12/413
CPC分类号： H04L12/40019 , H04L12/40143 , H04B2203/5445 , H04L12/2803 , H04L12/2838 , H04L2012/2843
摘要： An apparatus and method for media access control of a first node in a network on a powerline communication medium. The apparatus includes a priority controller for providing a transmit authorization signal. The authorization signal can be responsive to a unique priority of the first node in relation to other nodes in the network, with the priority controller receiving the node's priority from a node network controller in the first node. The apparatus includes an access controller for receiving the transmit authorization signal and, in response, communicating a transmit request signal to the node network controller. The apparatus also includes an arbitration controller for preventing the node from transmitting to the network until a predetermined number of other nodes have been allowed to precedentially access the network. The arbitration controller responds to the priority controller, and sends a transmit inhibition signal to the access controller, inhibiting node transmission irrespective of the authorization signal. The invention also provides a method for communication by a first node in a network having a plurality of nodes, including the steps of sensing a powerline communication medium for the presence of a carrier signal by the first node; inhibiting transmitting by the first node to the network if the presence of the carrier signal is sensed; and transmitting at least one data packet, if the carrier signal is not sensed on the network and the current priority period corresponds with a first predetermined priority period.
摘要翻译： 一种用于电力线通信介质上的网络中的第一节点的媒体访问控制的装置和方法。 该装置包括用于提供发送授权信号的优先级控制器。 授权信号可以响应于第一节点相对于网络中的其他节点的唯一优先级，优先级控制器从第一节点中的节点网络控制器接收节点的优先级。 该设备包括一个接入控制器，用于接收发送授权信号，并作为响应，将传输请求信号传送给节点网络控制器。 该装置还包括一个仲裁控制器，用于防止节点向网络传输，直到预定数量的其他节点被允许先前访问网络。 仲裁控制器响应优先级控制器，并向接入控制器发送发送禁止信号，禁止节点传输，而不管授权信号如何。 本发明还提供了一种用于具有多个节点的网络中的第一节点进行通信的方法，包括以下步骤：感测电力线通信介质以存在第一节点的载波信号; 如果感测到载波信号的存在，则禁止由第一节点发送到网络; 以及如果在所述网络上未检测到所述载波信号并且所述当前优先级周期对应于第一预定优先级周期，则发送至少一个数据分组。
-
公开(公告)号：US4395710A
公开(公告)日：1983-07-26
申请号：US210700
申请日：1980-11-26
IPC分类号： G06F13/00 , H04L12/417 , H04Q9/00 , H04J3/00
CPC分类号： H04L12/417
摘要： A serial data communications network in which a plurality of stations communicate among one another in an orderly and collision-free manner on a single serial bus. Each station incorporates an improved bus access circuit to operate in cooperation with the bus access circuit of every other station in the network. The resulting effect as to each station is the assignment of a unique, recurring time window during which the station may initiate a transmission on the serial bus exclusive of all other stations.
摘要翻译： 一种串行数据通信网络，其中多个站在单个串行总线上以有序且无碰撞的方式彼此通信。 每个站包含改进的总线访问电路，以与网络中的每个其他站的总线访问电路协同工作。 所产生的对每个站的影响是分配唯一的，循环的时间窗口，在该时间窗口期间，站可以在串行总线上发起除所有其他站之外的传输。
-
3.发明授权Microprocessor information exchange with updating of messages by asynchronous processors using assigned and/or available buffers in dual port memory 失效微处理器信息与双端口存储器中使用分配的和/或可用缓冲区的异步处理器更新消息进行交换
公开(公告)号：US5179665A
公开(公告)日：1993-01-12
申请号：US436112
申请日：1989-11-13
申请人： Charles J. Roslund , Linda L. Santoline , Albert W. Crew , Gilbert W. Remley , William D. Ghrist, III
发明人： Charles J. Roslund , Linda L. Santoline , Albert W. Crew , Gilbert W. Remley , William D. Ghrist, III
IPC分类号： G06F15/167
CPC分类号： G06F15/167
摘要： Updated images of messages are passed between asynchronous digital processors using dual port shared memory. In the basic form of the invention, three buffers in shared memory are assigned to each message. Where one of the processors is a controller for a data link channel carrying n messages, 2n+1 buffers are provided in free shared memory space with 2 buffers assigned to each message at all times and a common buffer serving as the third buffer for all of the messages. Where linked buffers in local memory of a controller processor receive message updates from a data highway, two buffers in shared memory are assigned to each message and a linked buffer in the controller local memory serves as the third buffer. The buffers containing the message updates are passed between processors by use of a buffer status array in shared memory. A semaphore lock in the array permits only one processor at a time to assign or release buffers.
摘要翻译： 消息的更新映像在使用双端口共享内存的异步数字处理器之间传递。 在本发明的基本形式中，共享存储器中的三个缓冲器被分配给每个消息。 其中一个处理器是用于携带n个消息的数据链路信道的控制器，在空闲共享存储器空间中提供2n + 1个缓冲器，并且随时分配给每个消息的2个缓冲器，以及用作所有 消息。 当控制器处理器的本地存储器中的链接缓冲器从数据高速公路接收消息更新时，共享存储器中的两个缓冲器被分配给每个消息，并且控制器本地存储器中的链接缓冲器用作第三缓冲器。 包含消息更新的缓冲区通过使用共享内存中的缓冲区状态数组在处理器之间传递。 数组中的信号量锁只允许一个处理器分配或释放缓冲区。
-
公开(公告)号：US4700174A
公开(公告)日：1987-10-13
申请号：US862335
申请日：1986-05-12
CPC分类号： G06J1/00
摘要： Apparatus and a method for use therein are disclosed for an analog signal processor, particularly one suited for use in nuclear power plant applications, which converts analog process signals to digital form and employs continuous on-line automatic calibration in order to accurately compensate for gain and bias errors occurring in its input analog circuitry.
摘要翻译： 公开了一种用于模拟信号处理器的设备及其方法，特别是适用于核电站应用的模拟信号处理器，其将模拟处理信号转换为数字形式，并采用连续的在线自动校准，以便准确地补偿增益和 其输入模拟电路中出现偏置误差。
-
5.发明授权
公开(公告)号：US5864680A
公开(公告)日：1999-01-26
申请号：US869473
申请日：1997-06-05
IPC分类号： G06F13/00 , G06F15/00 , H04L12/18 , G06F15/173
CPC分类号： H04L12/18
摘要： A computer network system repetitively distributes messages including uniquely identified blocks of real time data containing a current data image over a broadcast communications network to all real time stations for storage of each repetition of each entire block of data directly in station memory at a unique address space assigned to that uniquely identified block of data. The real time stations receive the blocks of data and alternatively receive other messages from the real time stations. The other messages have a recognized standard protocol, such as the TCP/IP or UDP/IP protocol of the Internet Protocol Suite.
摘要翻译： 计算机网络系统将包含唯一标识的包含当前数据图像的实时数据的块的消息广播地分发到广播通信网络，以将所有实时站重复地分发消息，以便在唯一地址空间中直接在站存储器中存储每个整个数据块的每次重复 分配给唯一标识的数据块。 实时站接收数据块，或者从实时站接收其他消息。 其他消息具有公认的标准协议，例如因特网协议套件的TCP / IP或UDP / IP协议。
-
6.发明授权Distributed microprocessor based sensor signal processing system for a complex process 失效基于分布式微处理器的传感器信号处理系统，用于复杂的过程
公开(公告)号：US4804515A
公开(公告)日：1989-02-14
申请号：US666696
申请日：1984-10-31
申请人： Albert W. Crew , James A. Neuner , Gilbert W. Remley , Robert E. Hager , George M. Chambers , Eric A. Delava , Susan A. Wilbur , Thomas J. Kenny , James F. Sutherland
发明人： Albert W. Crew , James A. Neuner , Gilbert W. Remley , Robert E. Hager , George M. Chambers , Eric A. Delava , Susan A. Wilbur , Thomas J. Kenny , James F. Sutherland
IPC分类号： G01D21/00 , G05B9/03 , G05B23/02 , G06F11/16 , G06F17/40 , G08C15/00 , G21C17/00 , G21D3/04 , G21C7/36
摘要： Signals from redundant sensors located throughout a pressurized water reactor (PWR) nuclear power plant are processed in four independent channel sets each of which includes a plurality of independent microcomputers which calibrate, convert to engineering units and calculate partial trip signals and engineered safeguard actuation signals from the sensor signals for use in the conventional voting logic of a plant protection system. The primary and secondary partial trip and engineered safeguard actuation functions associated with various postulated abnormal events are allocated to different independent microcomputers in the channel set for reliability. A test unit common to the channel set automatically, rapidly bypasses and tests each protection function independently while the other protection functions in the channel set remain on-line and also continually tests each microcomputer through a dummy test function performed along with the assigned protection functions. Signals representative of the analog value of the sensor signals are stored by the microcomputers and are transmitted by a serial data link through a common electrical isolation unit to a common analog output device for use by the plant control and monitoring systems under the control of a communication processor common to a group of microcomputers in the channel set.
摘要翻译： 来自位于整个压水反应堆（PWR）核电站的冗余传感器的信号在四个独立的通道组中进行处理，每个独立的通道组包括多个独立的微型计算机，其校准，转换为工程单位并计算部分跳闸信号和设计的保护启动信号 传感器信号用于植物保护系统的常规投票逻辑。 与各种假设的异常事件相关联的主要和次要部分行程和设计的保护动作功能被分配给可靠性通道组中的不同的独立微型计算机。 通道设置通用的测试单元自动快速旁路并测试每个保护功能，而通道组中的其他保护功能保持在线，并且还通过与分配的保护功能一起执行的虚拟测试功能来连续测试每台微型计算机。 代表传感器信号的模拟值的信号由微型计算机存储，并通过串行数据链路通过公共电气隔离单元发送到公共模拟输出设备，以供通信控制下的工厂控制和监控系统使用 通道集中的一组微型计算机共有的处理器。
-
公开(公告)号：US06532550B1
公开(公告)日：2003-03-11
申请号：US09501804
申请日：2000-02-10
申请人： Albert W. Crew , William D. Ghrist, III , Carl A. Vitalbo , Glenn E. Lang , Thomas Pierce Hayes
发明人： Albert W. Crew , William D. Ghrist, III , Carl A. Vitalbo , Glenn E. Lang , Thomas Pierce Hayes
IPC分类号： H02H305
摘要： A protection system for a complex process has four redundant protection sets, each of which produces partial reactor trip and partial safeguard actuation signals in pairs of microprocessor-based controllers. Two independent and redundant voting logic trains are provided for the partial reactor trip signals, and two identical, independent and redundant voting logic trains are provided for the partial safeguard actuation signals. Each of the trains includes a pair of redundant microprocessor-based voting logic controllers, each of which receives the partial reactor trip or partial safeguard actuation signals from each of the process protection sets and has a voting processor which generates an intermediate reactor trip or intermediate safeguard actuation signal in response to partial signals from a predetermined number of protection sets. The intermediate signals from the two voting logic controllers in each train are ANDed to generate train signals. The reactor trip train signals are then ORed to generate a reactor trip signal. Each of the train safeguard actuation signals activates a separate set of redundant components.
摘要翻译： 用于复杂过程的保护系统具有四个冗余保护装置，每个保护装置在成对的基于微处理器的控制器中产生部分电抗器跳闸和部分保护启动信号。 为部分电抗器跳闸信号提供两个独立和冗余的投票逻辑列，为部分保护启动信号提供两个相同，独立和冗余的投票逻辑列。 每个列车包括一对基于冗余的基于微处理器的投票逻辑控制器，每个控制器从每个过程保护组接收部分电抗器跳闸或部分保护启动信号，并具有产生中间电抗器跳闸或中间保护的投票处理器 响应于来自预定数量的保护组的部分信号的致动信号。 来自每个列车中的两个投票逻辑控制器的中间信号进行“与”运算以生成列车信号。 然后将反应堆跳闸序列信号进行OR运算以产生电抗器跳闸信号。 每个列车保护启动信号激活一组单独的冗余组件。
-
8.发明授权
公开(公告)号：US5327468A
公开(公告)日：1994-07-05
申请号：US901446
申请日：1992-06-19
申请人： Warren A. Edblad , Albert W. Crew , Carl J. Staab
发明人： Warren A. Edblad , Albert W. Crew , Carl J. Staab
CPC分类号： G06F1/14 , H04J3/0667 , H04L12/437 , H04J3/0664
摘要： The operating system clocks in each station on a counter rotating ring network of a distributed processing system are synchronized by latching the count in a free running counter in the network interface of each station at the instant a clock message transmitted by a timekeeper station is received. The timekeeper station then calculates from its operating system time-of-day clock and its free running counter, its time of reception of the clock message, and broadcasts this timekeeper time of reception to the other stations. Each other station calculates its own time of reception from its operating system time of day, and the count in its free running counter, and uses the difference between its time of reception and the timekeeper time of reception to correct its operating system time-of-day clock. Repeater and media propagation delays determined from the dynamic topography of the network are taken into account in calculating the correction factor. The free running counter can also be used to maintain a higher resolution local time of day than is available from the operating system time-of-day clock.
摘要翻译： 在接收到由计时器站发送的时钟消息的瞬间，通过在每个站的网络接口中的自由运行的计数器中将计数锁存在每个站中的分布式处理系统的反转环网上的每个站中的操作系统时钟。 计时站然后从其操作系统的时钟计时器及其自由运行计数器，其接收时钟消息的时间计算，并将该计时器的接收时间广播到其他站。 每个其他站从其操作系统的时间计算其自己的接收时间，以及其自由运行计数器中的计数，并且使用其接收时间与计时器接收时间之间的差异来校正其操作系统的时间 - 天钟。 在计算校正因子时，考虑了网络动态地形确定的中继器和媒体传播延迟。 还可以使用自由运行计数器来保持比当前操作系统时钟时钟更高的本地时间。
-
公开(公告)号：US5305314A
公开(公告)日：1994-04-19
申请号：US901445
申请日：1992-06-19
申请人： Warren A. Edblad , Linda L. Santoline , Carl J. Staab , Charles W. Einolf, Jr. , Albert W. Crew
发明人： Warren A. Edblad , Linda L. Santoline , Carl J. Staab , Charles W. Einolf, Jr. , Albert W. Crew
CPC分类号： H04L12/433 , H04L12/64 , Y10S370/906
摘要： Real time periodic messages generated by a plurality of stations on a data communication network and having data periods ranging from a shortest to a longest, where the longest data period is an integer multiple of all the others, are assigned by a server station to transmit time slots, equal in duration to the shortest data period, on a global basis to minimize the number of messages transmitted by all stations during each transmit time slot.
摘要翻译： 由数据通信网络上的多个站产生的具有数据周期范围从最短到最长（其中最长数据周期是所有其他数据周期的整数倍）的数据周期的实时周期性消息由服务器站分配以传送时间 在全局的基础上持续时间相等于最短数据周期的时隙，以便在每个发送时隙期间最小化所有站发送的消息的数量。
-
公开(公告)号：US4692299A
公开(公告)日：1987-09-08
申请号：US788983
申请日：1985-10-18
CPC分类号： G05B23/0256 , G05B9/03 , G06F11/16
摘要： A signal processor which applies non-linear dynamic compensation to an applied analog signal is tested by applying to a reference ramp signal compensation having a transfer function equal to the inverse of the transfer function of the signal processor. This test signal is applied to the signal processor in place of the sensor signal so that after the compensation of the processor is applied to it, the resultant signal should match the reference signal. When the signal processing is carried out digitally in a microcomputer and the response to the test signal is multiplexed back to the tester along with response signals from other microcomputers, variable time skewing of the returned test signal is eliminated by feeding the reference signal through a processing path parallel to that of the test signal and then comparing those two signals in the tester. The reference signal is also used in the microcomputer to continually generate a dummy actuation signal which provides a continuous check on microcomputer operation.
摘要翻译： 通过应用具有等于信号处理器的传递函数的逆的传递函数的参考斜坡信号补偿来测试对所应用的模拟信号应用非线性动态补偿的信号处理器。 该测试信号被代替传感器信号施加到信号处理器，使得在对处理器进行补偿之后，所得到的信号应该与参考信号相匹配。 当在微计算机中数字地进行信号处理并且对测试信号的响应与来自其他微型计算机的响应信号一起被复用回测试器时，通过处理馈送参考信号来消除所返回的测试信号的可变时间偏移 路径与测试信号的路径平行，然后比较测试仪中的两个信号。 参考信号也用于微型计算机中，以连续地产生虚拟致动信号，该虚拟致动信号提供对微型计算机操作的连续检查。
-
-
-
-
-
-
-
-
-
搜索结果
10 条记录 (耗时 0.018 秒)
