公开(公告)号：US06230231B1

公开(公告)日：2001-05-08

申请号：US09044490

申请日：1998-03-19

申请人： Kenneth J. DeLong ,  David S. Miller

发明人： Kenneth J. DeLong ,  David S. Miller

IPC分类号： G06F1200

CPC分类号： H04L45/745 ,  H04L12/4641 ,  H04L69/22

摘要： A cache line index for an address cache entry is calculated by organizing an address such as a Media Access Control (“MAC”) address into a plurality of intermediate elements, barrel shifting the bits of at least one of the intermediate elements in accordance with predetermined criteria, and folding the intermediate address elements together with an exclusive-OR function. A Virtual Local Area Network (“VLAN”) index may also be included in cache line index calculation. The VLAN index enables segmentation of the cache into virtual tables. The tag portion of the cache entry includes a subset of the complete set of intermediate elements. The intermediate elements in the cache entry can be employed in conjunction with the cache line index to recover the original MAC address. Hence, the size of the tag portion of the address cache entry is reduced relative to the full MAC address without a reduction in the information content of the entry.

摘要翻译： 通过将诸如媒体访问控制（“MAC”）地址的地址组织到多个中间元素中来计算用于地址高速缓存条目的高速缓存行索引，根据预定的桶来移位至少一个中间元素的比特 标准，并将中间地址元素与异或函数一起折叠。 虚拟局域网（“VLAN”）索引也可能包含在高速缓存行索引计算中。 VLAN索引可以将缓存分割成虚拟表。 高速缓存条目的标签部分包括完整的一组中间元素的子集。 高速缓存条目中的中间元素可以与高速缓存行索引一起使用以恢复原始MAC地址。 因此，地址高速缓存条目的标签部分的大小相对于完整MAC地址减小，而不会减少条目的信息内容。

公开(公告)号：US6112258A

公开(公告)日：2000-08-29

申请号：US44291

申请日：1998-03-19

申请人： David S. Miller ,  Kenneth J. DeLong

发明人： David S. Miller ,  Kenneth J. DeLong

IPC分类号： G06F13/364 ,  G06F13/00

CPC分类号： G06F13/364

摘要： An arbiter circuit is employed to isolate a processor from a plurality of Input/Output Application Specific Integrated Circuits ("I/O ASICs"). The processor is coupled to the arbiter through a control bus, an address bus and a data bus. The arbiter is coupled to the I/O ASICs through an extension of the control bus and a combined address/data bus. The arbiter manages control of the control bus extension and address/data bus to enable contemporaneous transmission ("broadcast") of messages to the I/O ASICs, and enable the processor to access the I/O ASICs. Only one of the I/O ASICs is granted control of the control bus extension and address/data bus at any point in time. The processor may also be granted sole control of the control bus extension and address/data bus.

摘要翻译： 采用仲裁电路将处理器与多个输入/输出专用集成电路（“I / O ASIC”）隔离开来。 处理器通过控制总线，地址总线和数据总线耦合到仲裁器。 仲裁器通过控制总线的扩展和组合的地址/数据总线耦合到I / O ASIC。 仲裁器管理控制总线扩展和地址/数据总线的控制，以实现向I / O ASIC同时传输（“广播”）消息，并使处理器能够访问I / O ASIC。 只有其中一个I / O ASIC被授权在任何时间点控制总线扩展和地址/数据总线。 处理器也可以被授予对控制总线扩展和地址/数据总线的唯一控制。

公开(公告)号：US07751371B2

公开(公告)日：2010-07-06

申请号：US11492499

申请日：2006-07-24

申请人： Ephraim Zehavi ,  David S. Miller ,  Judith LaRocca

发明人： Ephraim Zehavi ,  David S. Miller ,  Judith LaRocca

IPC分类号： H04B7/216

CPC分类号： H04L1/0071 ,  H04B7/18543 ,  H04B7/216 ,  H04J13/0022 ,  H04J13/0048 ,  H04J13/18

摘要： A variable rate transmission system where a packet of variable rate data is transmitted on a traffic channel if the capacity of the traffic channel is greater than or equal to the data rate of the packet. When the rate of the packet of variable rate data exceeds the capacity of the traffic channel, the packet is transmitted on a traffic channel and at least one overflow channel. Also described is a receiving system for receiving and reassembling the data transmitted on the traffic channel and at least one additional overflow channel.

摘要翻译： 可变速率传输系统，其中如果业务信道的容量大于或等于分组的数据速率，则在业务信道上发送可变速率数据的分组。 当可变速率数据的分组的速率超过业务信道的容量时，分组在业务信道和至少一个溢出信道上发送。 还描述了一种用于接收和重新组合在业务信道上发送的数据和至少一个附加溢出信道的接收系统。

公开(公告)号：US06549780B2

公开(公告)日：2003-04-15

申请号：US09752941

申请日：2000-12-29

申请人： Leonard N. Schiff ,  David S. Miller

发明人： Leonard N. Schiff ,  David S. Miller

IPC分类号： H04Q720

CPC分类号： H04B7/18541

摘要： A handoff technique in which system users detect transitions in service between a current service area and an adjacent service area, and request a forward link channel in the new service area when a detected signal strength for the new service area exceeds predetermined threshold levels. The forward communications link in the current service area is maintained until the strength of the new service area signal reaches a certain level and appropriate channel quality is confirmed, as based on various known criteria. Typically, service area transitions are detected using the signal strength of pilot or paging signals associated with service areas, which are used to determine a relative signal strength of new service area signals. Pilot signal level adjustments used to counter roll-off effects are detected and compensated for in comparing signal levels. To minimize the burden on system resources, new service area signals are not selectable until a minimum time has passed, or a minimum change in energy from a prior pilot signal is detected. In addition, communications using the previous service area can be dropped almost immediately upon engaging the new service area.

摘要翻译： 一种切换技术，其中系统用户检测当前服务区域和相邻服务区域之间服务中的转换，并且当新服务区域的检测到的信号强度超过预定阈值电平时，请求新服务区域中的前向链路信道。 基于各种已知标准，保持当前服务区域中的正向通信链路，直到新服务区域信号的强度达到一定水平，并确认适当的信道质量。 通常，使用用于确定新的服务区域信号的相对信号强度的与服务区域相关联的导频或寻呼信号的信号强度来检测服务区域转换。 在比较信号电平时，检测并补偿用于计算滚降效果的导频信号电平调整。 为了最小化系统资源的负担，新的服务区域信号在最小时间过去之前是不可选择的，或者是从先前的导频信号中检测到能量的最小变化。 此外，使用先前服务区域的通信可以在新服务区域几乎立即被丢弃。

公开(公告)号：US06310874B1

公开(公告)日：2001-10-30

申请号：US09044294

申请日：1998-03-19

申请人： David S. Miller ,  Lawrence Aaron Boxer ,  Edward A. Heiner, Jr.

发明人： David S. Miller ,  Lawrence Aaron Boxer ,  Edward A. Heiner, Jr.

IPC分类号： H04L1250

CPC分类号： H04L29/12018 ,  H04L12/185 ,  H04L29/06 ,  H04L29/12009 ,  H04L29/12801 ,  H04L61/00 ,  H04L61/10 ,  H04L61/6004

摘要： Flow of data units to an address resolution processor is controlled to inhibit multiple data units from a single multicast flow from being enqueued with the address resolution processor. In a switch having a plurality of Input/Output Application Specific Integrated Circuits (“I/O ASICs”) with a plurality of ports, no more than one data unit from each I/O ASIC is permitted to be enqueued with the address resolution processor at any point in time. A separate learn pending indicator may be defined for each I/O ASIC in the switch.

摘要翻译： 控制数据单元到地址解析处理器的流程，以阻止来自单个多播流的多个数据单元与地址解析处理器一起排队。 在具有多个具有多个端口的多个输入/输出专用集成电路（“I / O ASIC”）的开关中，来自每个I / O ASIC的不超过一个数据单元被允许用地址解析处理器 在任何时间点。 可以为交换机中的每个I / O ASIC定义单独的学习挂起指示符。

公开(公告)号：US20100307221A1

公开(公告)日：2010-12-09

申请号：US12455711

申请日：2009-06-05

申请人： Benjamin Morgan Smith ,  David S. Miller ,  Imtiaz Ali ,  Douglas G. Gerring

发明人： Benjamin Morgan Smith ,  David S. Miller ,  Imtiaz Ali ,  Douglas G. Gerring

IPC分类号： G01N3/56

CPC分类号： G01M13/023

摘要： A belt measurement device comprising a first portion and a second portion, the first and second portion are substantially parallel, the first portion and second portion defining a predetermined engagement position for the device in a belt, and, a switch cooperatively disposed with the first portion and second portion, the switch capable of closing a circuit by being compressed between a belt surface and the device, a light is illuminated upon the switch closing the circuit.

摘要翻译： 一种带测量装置，包括第一部分和第二部分，所述第一部分和第二部分基本上平行，所述第一部分和第二部分限定了所述装置在带中的预定接合位置，以及与所述第一部分协作地设置的开关 以及第二部分，所述开关能够通过在带表面和所述装置之间被压缩来闭合电路，所述开关在所述开关闭合所述电路时被照亮。

公开(公告)号：US07379758B2

公开(公告)日：2008-05-27

申请号：US10624257

申请日：2003-07-21

申请人： Leonard N. Schiff ,  David S. Miller

发明人： Leonard N. Schiff ,  David S. Miller

IPC分类号： H04M1/00 ,  H04B7/00 ,  H04Q7/00

CPC分类号： H04B7/18519

摘要： A satellite communication system for providing communications between user terminals and gateways constituted with m primary satellites. In one embodiment, n back up satellites are also provided. Further, each satellite, primary or back-up, is equipped to project N/m beams onto and across an area in a loosely-packed array manner. M of the m primary and n back-up satellites collectively create N beam spots to cover the area. Moreover, each sub-area is covered by a beam spot separated from another sub-area covered by another beam spot by one beam width. Each satellite is also equipped to facilitate communication over 1 of m band of frequencies on one beam. As a result, any of the m primary satellites may be efficiently replaced on demand by a selected one of the n back-up satellites. The gateways and user terminals are configured to communicate signals through or with both or either the primary and back-up satellites.

摘要翻译： 一种卫星通信系统，用于在由m个主卫星构成的用户终端和网关之间提供通信。 在一个实施例中，还提供n个备用卫星。 此外，每个卫星，主要或备用装备，以松散排列的方式将N / m波束投射到一个区域上并跨越一个区域。 m个主要和n个后备卫星的M共同创造N个光束点以覆盖该区域。 此外，每个子区域被从另一个光束点覆盖一个光束宽度的另一个子区域分离的光束点覆盖。 每个卫星还配备了一个波束上的m个频带范围内的通信。 结果，可以根据需要由n个备用卫星中的所选择的一个有效地替换任何一个m个主卫星。 网关和用户终端被配置为通过或与主卫星和后备卫星两者或任一者传送信号。

公开(公告)号：US06697787B1

公开(公告)日：2004-02-24

申请号：US09776707

申请日：2001-02-06

申请人： David S. Miller

发明人： David S. Miller

IPC分类号： G06F1760

CPC分类号： G06Q40/02 ,  G06Q20/207 ,  G06Q20/389 ,  G06Q40/00 ,  G06Q40/123

摘要： An electronic intermediary electronically connects with a tax data provider and collects electronically tax data from the tax data provider. The electronic intermediary processes the tax data collected electronically, and prepares an electronic tax return using the processed tax data.

摘要翻译： 电子中介人与税务数据提供者电子联系，并从税务数据提供者处收集电子税务数据。 电子中介处理电子收集的税务数据，并使用已处理的税务数据编制电子税表。

公开(公告)号：US06202052B1

公开(公告)日：2001-03-13

申请号：US09073027

申请日：1998-05-07

申请人： David S. Miller

发明人： David S. Miller

IPC分类号： G06F1760

CPC分类号： G06Q40/02 ,  G06Q20/207 ,  G06Q20/389 ,  G06Q40/00 ,  G06Q40/123

摘要： An electronic intermediary electronically connects with a tax data provider and collects electronically tax data from the tax data provider. The electronic intermediary processes the tax data collected electronically, and prepares an electronic tax return using the processed tax data. The electronic intermediary connects electronically with a taxing authority, files the electronic tax return with the taxing authority, and arranges electronically for the payment or receipt of any tax liability or refund, respectively.

摘要翻译： 电子中介人与税务数据提供者电子连接，并从税务数据提供者收集电子税务数据。 电子中介处理电子收集的税务数据，并使用已处理的税务数据编制电子税表。 电子中介人与税务机关电子联系，向税务机关提交电子报税表，并分别以电子方式安排付款或收到任何税务责任或退款。

公开(公告)号：US5511067A

公开(公告)日：1996-04-23

申请号：US261539

申请日：1994-06-17

申请人： David S. Miller

发明人： David S. Miller

IPC分类号： H04W88/08 ,  H04B7/216 ,  H04J13/00 ,  H04Q7/00

CPC分类号： H04W88/08

摘要： The invention provides a layered channel software element which supervises the operation of channel element modem resources in a CDMA cellular telephone system that includes forward channels for conveying message and signalling data from a CDMA system base station to mobile units and reverse channels for conveying message and signalling data from mobile units to base stations. Each channel is implemented in a channel element including a general purpose processor and a modem application-specific integrated circuit ASIC. The layered channel software element executes on the general processor. The layered channel software element provides a structure and function for transferring message and signalling data between the telecommunication system and the modem ASIC and also for establishing channel operations by providing channel configuration information to the modem ASIC.

摘要翻译： 本发明提供了一种分层信道软件元件，其监视CDMA蜂窝电话系统中的信道元素调制解调器资源的操作，该CDMA蜂窝电话系统包括用于将消息和信令数据从CDMA系统基站传送到移动单元和用于传送消息和信令的反向信道的前向信道 从移动单元到基站的数据。 每个信道在包括通用处理器和调制解调器专用集成电路ASIC的信道元素中实现。 分层通道软件元件在通用处理器上执行。 分层信道软件元件提供用于在电信系统和调制解调器ASIC之间传送消息和信令数据的结构和功能，并且还用于通过向调制解调器ASIC提供信道配置信息来建立信道操作。