Interface control apparatus and setting method for an interface
    2.
    发明申请
    Interface control apparatus and setting method for an interface 审中-公开
    接口的接口控制装置和设置方法

    公开(公告)号:US20070192050A1

    公开(公告)日:2007-08-16

    申请号:US11699671

    申请日:2007-01-29

    IPC分类号: G01R35/00

    CPC分类号: G06F13/385

    摘要: According to one embodiment, an interface control apparatus controls an interface to which a calibration is required in use. The interface control apparatus includes an interface controller configured to drive the interface, a storage device that stores a predicted value of a setting value after the calibration is carried out on the interface, the setting value to be set to the interface controller, and a setting unit configured to set the setting value to the interface controller based on the predicted value stored in the storage device.

    摘要翻译: 根据一个实施例,接口控制装置控制在使用中需要校准的接口。 接口控制装置包括:接口控制器,其被配置为驱动接口;存储装置,其在接口上执行校准后存储设定值的预测值,设定到接口控制器的设定值,以及设定值 单元,其被配置为基于存储在存储设备中的预测值来将设置值设置为接口控制器。

    Memory management device and method for managing access to a nonvolatile semiconductor memory
    3.
    发明授权
    Memory management device and method for managing access to a nonvolatile semiconductor memory 有权
    用于管理对非易失性半导体存储器的访问的存储器管理装置和方法

    公开(公告)号:US09081661B2

    公开(公告)日:2015-07-14

    申请号:US13234197

    申请日:2011-09-16

    IPC分类号: G06F12/10 G06F12/02

    CPC分类号: G06F12/0246 G06F2212/7201

    摘要: According to one embodiment, a memory management device includes a history management unit, an address translation table, an address management unit, and a data management unit. The history management unit manages an access history for data stored in a nonvolatile semiconductor memory. The address translation table includes a translation table of a logical address and a physical address corresponding to the data. The address management unit specifies, based on the access history, second data to be accessed after access to first data being stored in the nonvolatile semiconductor memory, and registers a second physical address corresponding to the second data in the address translation table in association with a first logical address corresponding to the first data. The data management unit reads out the second data from the nonvolatile semiconductor memory to a buffer.

    摘要翻译: 根据一个实施例,存储器管理装置包括历史管理单元,地址转换表,地址管理单元和数据管理单元。 历史管理单元管理存储在非易失性半导体存储器中的数据的访问历史。 地址转换表包括与数据对应的逻辑地址和物理地址的转换表。 地址管理单元基于访问历史来指定在访问存储在非易失性半导体存储器中的第一数据之后要访问的第二数据,并且将与第二数据相对应的第二物理地址与地址转换表相关联地登记在地址转换表中 第一逻辑地址对应于第一数据。 数据管理单元将第二数据从非易失性半导体存储器读出到缓冲器。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:US20120072798A1

    公开(公告)日:2012-03-22

    申请号:US13233096

    申请日:2011-09-15

    IPC分类号: G06F11/07

    CPC分类号: G06F11/1012

    摘要: According to one embodiment, a semiconductor device includes a NAND flash memory, an error correction unit, and a table. The NAND flash memory is configured to hold data. The error correction unit detects and corrects errors in the data. The table holds information on an error correction method associated with each piece of data. The error correction unit selects an error correction method to be applied for each piece of data in accordance with the information in the table.

    摘要翻译: 根据一个实施例,半导体器件包括NAND闪速存储器,纠错单元和表格。 NAND闪存配置为保存数据。 纠错单元检测并纠正数据中的错误。 该表包含与每条数据相关联的纠错方法的信息。 误差校正单元根据表中的信息选择要应用于每条数据的纠错方法。