Touch panel including graphene and method of manufacturing the same
    2.
    发明授权
    Touch panel including graphene and method of manufacturing the same 有权
    触摸面板包括石墨烯及其制造方法

    公开(公告)号:US09098162B2

    公开(公告)日:2015-08-04

    申请号:US13576795

    申请日:2011-02-01

    IPC分类号: G06F3/045

    摘要: A touch panel comprising a first substrate; a second substrate disposed facing the first substrate; a first conductive layer disposed on at least one surface of the first substrate; a second conductive layer disposed on at least one surface of the second substrate; first electrodes electrically connected to the first conductive layer; and second electrodes electrically connected to the second conductive layer, wherein at least one of the first conductive layer and the second conductive layer comprises graphene.

    摘要翻译: 一种触摸面板,包括第一基板; 面向所述第一基板设置的第二基板; 设置在所述第一基板的至少一个表面上的第一导电层; 设置在所述第二基板的至少一个表面上的第二导电层; 电连接到第一导电层的第一电极; 以及电连接到第二导电层的第二电极,其中第一导电层和第二导电层中的至少一个包括石墨烯。

    TOUCH PANEL AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    TOUCH PANEL AND METHOD OF MANUFACTURING THE SAME 有权
    触控面板及其制造方法

    公开(公告)号:US20120319976A1

    公开(公告)日:2012-12-20

    申请号:US13576795

    申请日:2011-02-01

    IPC分类号: G06F3/041 H05K13/00 B82Y99/00

    摘要: A touch panel comprising a first substrate; a second substrate disposed facing the first substrate; a first conductive layer disposed on at least one surface of the first substrate; a second conductive layer disposed on at least one surface of the second substrate; first electrodes electrically connected to the first conductive layer; and second electrodes electrically connected to the second conductive layer, wherein at least one of the first conductive layer and the second conductive layer comprises graphene.

    摘要翻译: 一种触摸面板,包括第一基板; 面向所述第一基板设置的第二基板; 设置在所述第一基板的至少一个表面上的第一导电层; 设置在所述第二基板的至少一个表面上的第二导电层; 电连接到第一导电层的第一电极; 以及电连接到第二导电层的第二电极,其中第一导电层和第二导电层中的至少一个包括石墨烯。

    Semiconductor memory device with vertical fuse
    5.
    发明授权
    Semiconductor memory device with vertical fuse 失效
    具有垂直保险丝的半导体存储器件

    公开(公告)号:US07649240B2

    公开(公告)日:2010-01-19

    申请号:US11704300

    申请日:2007-02-09

    IPC分类号: H01L29/00

    摘要: A semiconductor memory device having an improved fuse structure may include an interlayer insulating film on a semiconductor substrate, an opening in the interlayer insulating film, a vertical fuse that may conform to the opening, a fuse insulating film on the vertical fuse that may fill the opening, and metal wiring lines that may be electrically connected to the vertical fuse.

    摘要翻译: 具有改进的熔丝结构的半导体存储器件可以包括在半导体衬底上的层间绝缘膜,层间绝缘膜中的开口,可以符合开口的垂直熔丝,垂直保险丝上的熔丝绝缘膜可以填充 开口和可以电连接到垂直保险丝的金属布线。

    Semiconductor memory device and method of fabricating the same
    6.
    发明申请
    Semiconductor memory device and method of fabricating the same 失效
    半导体存储器件及其制造方法

    公开(公告)号:US20070181969A1

    公开(公告)日:2007-08-09

    申请号:US11704300

    申请日:2007-02-09

    IPC分类号: H01L29/00

    摘要: A semiconductor memory device having an improved fuse structure may include an interlayer insulating film on a semiconductor substrate, an opening in the interlayer insulating film, a vertical fuse that may conform to the opening, a fuse insulating film on the vertical fuse that may fill the opening, and metal wiring lines that may be electrically connected to the vertical fuse.

    摘要翻译: 具有改进的熔丝结构的半导体存储器件可以包括在半导体衬底上的层间绝缘膜,层间绝缘膜中的开口,可以符合开口的垂直熔丝,垂直保险丝上的熔丝绝缘膜可以填充 开口和可以电连接到垂直保险丝的金属布线。