公开(公告)号：US20080250374A1

公开(公告)日：2008-10-09

申请号：US12067583

申请日：2005-09-20

申请人： Kevin D. Lucas ,  Robert E. Boone ,  Karl Wimmer ,  Kyle Patterson

发明人： Kevin D. Lucas ,  Robert E. Boone ,  Karl Wimmer ,  Kyle Patterson

IPC分类号： G06F17/50

CPC分类号： G03F1/36

摘要： A method is provided for making an integrated circuit. Cell representing a layout of a set of features, is divided into at least a first region and a second region. Optical Proximity Correction is carried out on at least the first region of cell. One or more instances of cell are located to define IC prior to carrying out final OPC optimisation on the second regions of each cell in the defined IC.

摘要翻译： 提供了一种制造集成电路的方法。 表示一组特征的布局的单元被划分为至少第一区域和第二区域。 至少在细胞的第一区域进行光学邻近校正。 定位单元的一个或多个实例以在对所定义的IC中的每个单元的第二区域进行最终OPC优化之前定义IC。

公开(公告)号：US11014622B1

公开(公告)日：2021-05-25

申请号：US16450584

申请日：2019-06-24

申请人： Kyle Patterson

发明人： Kyle Patterson

IPC分类号： B62J1/20

摘要： A retractable cover system may include a cover adapted to cover an object, a holder, and a retraction cord arranged to pull the cover into the holder when the cover is not in use, wherein the cover, the holder and the retraction cord are arranged to cause the cover to collapse as it is pulled into the holder. The cover may include a retraction channel, and the holder may include a storage sleeve. The retraction channel may be arranged to collapse the cover in response to pulling the retraction cord by gathering the cover as the cover is pulled into the storage sleeve by the retraction cord.

公开(公告)号：US07935547B2

公开(公告)日：2011-05-03

申请号：US12279672

申请日：2006-02-17

申请人： Kevin Lucas ,  Kyle Patterson ,  Sergei Postnikov

发明人： Kevin Lucas ,  Kyle Patterson ,  Sergei Postnikov

IPC分类号： H01L21/00

CPC分类号： G03F1/62 ,  G03F1/36

摘要： A method for patterning a layer on a semiconductor substrate includes forming a layer of a semiconductor substrate and exposing the layer to light. The light travels through a second pellicle that is manufactured by a method that includes determining a first transmission of a first light through a first pellicle, wherein the first light is normal to the first pellicle, determining a second transmission of a second light through the first pellicle, wherein the second light is not normal to the first pellicle, and modifying the first pellicle to form a second pellicle using the first and second transmission.

摘要翻译： 用于在半导体衬底上图案化层的方法包括形成半导体衬底的层并将该层暴露于光。 光穿过通过包括确定通过第一防护薄膜的第一光的第一透射的方法制造的第二防护薄膜，其中第一光垂直于第一防护薄膜，确定通过第一防护膜的第二光的第二透射 防护薄膜，其中所述第二光不与所述第一防护薄膜正交，并且使用所述第一和第二透射来修饰所述第一防护薄膜以形成第二防护薄膜。

公开(公告)号：US20070141770A1

公开(公告)日：2007-06-21

申请号：US11676100

申请日：2007-02-16

申请人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

发明人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

IPC分类号： H01L21/8234

CPC分类号： H01L21/02164 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/31612 ,  H01L21/32139 ,  H01L29/6659 ,  H01L29/7833 ,  Y10S438/902 ,  Y10S438/952

摘要： In a making a semiconductor device, a patterning stack above a conductive material that is to be etched has a patterned photoresist layer that is used to pattern an underlying a tetraethyl-ortho-silicate (TEOS) layer. The TEOS layer is deposited at a lower temperature than is conventional. The low temperature TEOS layer is over an organic anti-reflective coating (ARC) that is over the conductive layer. The low temperature TEOS layer provides adhesion between the organic ARC and the photoresist, has low defectivity, operates as a hard mask, and serves as a phase shift layer that helps, in combination with the organic ARC, to reduce undesired reflection.

摘要翻译： 在制造半导体器件中，待蚀刻的导电材料上方的图案化叠层具有图案化的光致抗蚀剂层，其用于对四乙基原硅酸盐（TEOS）层进行图案化。 在比常规温度低的温度下沉积TEOS层。 低温TEOS层位于导电层上方的有机抗反射涂层（ARC）上。 低温TEOS层提供有机ARC和光致抗蚀剂之间的粘附，具有低缺陷性，作为硬掩模操作，并且用作与有机ARC组合有助于减少不期望的反射的相移层。

公开(公告)号：US20090130865A1

公开(公告)日：2009-05-21

申请号：US12279672

申请日：2006-02-17

申请人： Kevin Lucas ,  Kyle Patterson ,  Sergei Postnikov

发明人： Kevin Lucas ,  Kyle Patterson ,  Sergei Postnikov

IPC分类号： H01L21/428

CPC分类号： G03F1/62 ,  G03F1/36

摘要： A method for patterning a layer on a semiconductor substrate includes forming a layer of a semiconductor substrate and exposing the layer to light. The light travels through a second pellicle that is manufactured by a method that includes determining a first transmission of a first light through a first pellicle, wherein the first light is normal to the first pellicle, determining a second transmission of a second light through the first pellicle, wherein the second light is not normal to the first pellicle, and modifying the first pellicle to form a second pellicle using the first and second transmission.

摘要翻译： 用于在半导体衬底上图案化层的方法包括形成半导体衬底的层并将该层暴露于光。 光穿过通过包括确定通过第一防护薄膜的第一光的第一透射的方法制造的第二防护薄膜，其中第一光垂直于第一防护薄膜，确定通过第一防护膜的第二光的第二透射 防护薄膜，其中所述第二光不与所述第一防护薄膜正交，并且使用所述第一和第二透射来修饰所述第一防护薄膜以形成第二防护薄膜。

公开(公告)号：US20060199087A1

公开(公告)日：2006-09-07

申请号：US11071809

申请日：2005-03-03

申请人： Kevin Lucas ,  Robert Boone ,  Kyle Patterson

发明人： Kevin Lucas ,  Robert Boone ,  Kyle Patterson

IPC分类号： G03F7/00

CPC分类号： G03F7/70441 ,  G03F7/70941

摘要： An original layout of an integrated circuit is modified using optical proximity correction (OPC) to obtain a second layout. During OPC, a sensitivity to flare for each feature is conveniently identified. To map the flare, the amplitude of intensity is mapped over a field of exposure, which is typically a rectangle-shaped area corresponding to an exposure of a stepper. The field of exposure is divided into regions in which a region is characterized as having substantially the same amplitude throughout. For each feature a decision is made whether to make a further correction or not. If correction is desired, the amount of correction is based in part on the region in which the feature is located and the sensitivity of the feature. This same approach is applicable to other properties than flare that vary based on the location within the field of exposure.

摘要翻译： 使用光学邻近校正（OPC）修改集成电路的原始布局以获得第二布局。 在OPC期间，可以方便地识别每个功能对闪光的敏感度。 为了映射耀斑，将强度的幅度映射在曝光场上，该场通常是对应于步进曝光的矩形区域。 曝光领域被划分为其中区域被表征为具有基本上相同振幅的区域。 对于每个功能，决定是否进一步修正。 如果需要校正，校正量部分地基于特征所在的区域和特征的灵敏度。 这种相同的方法适用于根据暴露领域内的位置而变化的其他特性。

公开(公告)号：US20050181596A1

公开(公告)日：2005-08-18

申请号：US11100163

申请日：2005-04-06

申请人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

发明人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

IPC分类号： H01L21/027 ,  H01L21/033 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/4763

CPC分类号： H01L21/02164 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/31612 ,  H01L21/32139 ,  H01L29/6659 ,  H01L29/7833 ,  Y10S438/902 ,  Y10S438/952

摘要： In a making a semiconductor device, a patterning stack above a conductive material that is to be etched has a patterned photoresist layer that is used to pattern an underlying a tetraethyl-ortho-silicate (TEOS) layer. The TEOS layer is deposited at a lower temperature than is conventional. The low temperature TEOS layer is over an organic anti-reflective coating (ARC) that is over the conductive layer. The low temperature TEOS layer provides adhesion between the organic ARC and the photoresist, has low defectivity, operates as a hard mask, and serves as a phase shift layer that helps, in combination with the organic ARC, to reduce undesired reflection.

公开(公告)号：US20050026338A1

公开(公告)日：2005-02-03

申请号：US10628668

申请日：2003-07-28

申请人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

发明人： Douglas Reber ,  Mark Hall ,  Kurt Junker ,  Kyle Patterson ,  Tab Stephens ,  Edward Theiss ,  Srikanteswara Dakshiina-Murthy ,  Marilyn Wright

IPC分类号： H01L21/027 ,  H01L21/033 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/332

CPC分类号： H01L21/02164 ,  H01L21/02274 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/31612 ,  H01L21/32139 ,  H01L29/6659 ,  H01L29/7833 ,  Y10S438/902 ,  Y10S438/952

摘要： In a making a semiconductor device, a patterning stack above a conductive material that is to be etched has a patterned photoresist layer that is used to pattern an underlying a tetraethyl-ortho-silicate (TEOS) layer. The TEOS layer is deposited at a lower temperature than is conventional. The low temperature TEOS layer is over an organic anti-reflective coating (ARC) that is over the conductive layer. The low temperature TEOS layer provides adhesion between the organic ARC and the photoresist, has low defectivity, operates as a hard mask, and serves as a phase shift, layer that helps, in combination with the organic ARC, to reduce undesired reflection.

摘要翻译： 在制造半导体器件中，待蚀刻的导电材料上方的图案化叠层具有图案化的光致抗蚀剂层，其用于对四乙基原硅酸盐（TEOS）层进行图案化。 在比常规温度低的温度下沉积TEOS层。 低温TEOS层位于导电层上方的有机抗反射涂层（ARC）上。 低温TEOS层提供有机ARC和光致抗蚀剂之间的粘附，具有低缺陷性，作为硬掩模操作，并且用作相移层，有助于与有机ARC组合以减少不期望的反射。

公开(公告)号：US07615318B2

公开(公告)日：2009-11-10

申请号：US11253061

申请日：2005-10-18

申请人： Kyle Patterson ,  Yves Rody ,  Christophe Couderc ,  Corinne Miramond-Collet

发明人： Kyle Patterson ,  Yves Rody ,  Christophe Couderc ,  Corinne Miramond-Collet

IPC分类号： G03F1/00

CPC分类号： G03F1/30 ,  G03F1/70

摘要： For cases where one edge of a design feature is to be printed through a shifter mask and another one is to be printed through a binary trim mask, and where no upsizing can be performed due to the local density of the design, it is proposed to add shifters with respect to the shifter mask in such a way that all the edges are printed by the phase shift mask.

摘要翻译： 对于要通过移位掩模打印设计特征的一个边缘的情况，另一个边缘将通过二进制修剪蒙版打印，并且由于设计的局部密度而不能执行任何大型化， 相对于移位器掩模添加移位器，使得所有边缘都被相移掩模打印。

公开(公告)号：US20080171285A1

公开(公告)日：2008-07-17

申请号：US10595762

申请日：2005-02-15

申请人： Kyle Patterson ,  Kirk Strozewski

发明人： Kyle Patterson ,  Kirk Strozewski

IPC分类号： G03C1/00 ,  G03F7/26

CPC分类号： G03F7/11 ,  G03F7/2041 ,  G03F7/70341

摘要： In an immersion lithography method, the photoresist layer is provided with a shield layer to protect it from degradation caused by contact with the immersion liquid. The shield layer is transparent at the exposure wavelength and is substantially impervious to the immersion liquid. The shield layer can be formed of a material which can be removed using the same developer as is used to develop the photoresist layer after exposure.

摘要翻译： 在浸没式光刻方法中，光致抗蚀剂层设置有屏蔽层，以防止其与浸没液体接触引起的劣化。 屏蔽层在曝光波长下是透明的，并且基本上不渗透浸液。 屏蔽层可以由可以用曝光后用于显影光致抗蚀剂层的相同显影剂除去的材料形成。