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1.发明申请PRECISE DELAY ALIGNMENT BETWEEN AMPLITUDE AND PHASE/FREQUENCY MODULATION PATHS IN A DIGITAL POLAR TRANSMITTER 有权数字极性放大器中的幅度和相位/频率调制方式之间的精确延迟对准公开(公告)号：US20070189417A1
公开(公告)日：2007-08-16
申请号：US11675565
申请日：2007-02-15
CPC分类号： H04L27/368 , H03C5/00 , H04L7/0029 , H04L7/0041 , H04L7/005 , H04L7/0079 , H04L7/02
摘要： A novel apparatus for and method of delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter. The invention provides a fully digital delay alignment mechanism where better than nanosecond alignment is achieved by accounting for processing delays in the digital circuit modules of the transmitter and by the use of programmable delay elements spread across several clock domains. Tapped delay lines compensate for propagation and settling delays in analog elements such as the DCO, dividers, quad switch, buffers, level shifters and digital pre-power amplifier (DPA). A signal correlative mechanism is provided whereby data from the amplitude and phase/frequency modulation paths to be matched is first interpolated and then cross-correlated to achieve accuracy better than the clock domain of comparison. Within the ADPLL portion of the transmitter, precise alignment of reference and direct point injection points in the ADPLL is provded using multiple clock domains, tapped delay lines and clock adjustment circuits.
摘要翻译： 数字极性发射机的幅度和相位/频率调制路径之间的延迟对准的新型装置和方法。 本发明提供了一种全数字延迟对准机制，其通过考虑发射机的数字电路模块中的处理延迟以及通过使用分布在几个时钟域上的可编程延迟元件来实现比纳秒对准更好的方法。 分接延迟线补偿模拟元件（如DCO，分频器，四通道开关，缓冲器，电平移位器和数字预功率放大器（DPA））中的传播和稳定延迟。 提供了一种信号相关机制，其中来自要匹配的幅度和相位/频率调制路径的数据首先被内插，然后进行交叉相关，以获得比时钟域更好的比较。 在发射机的ADPLL部分内，使用多个时钟域，抽头延迟线和时钟调整电路来证明ADPLL中的参考点和直接点注入点的精确对准。
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2.发明授权Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter 有权数字极化发射机中幅度和相位/频率调制路径之间的精确延迟对准公开(公告)号：US07817747B2
公开(公告)日：2010-10-19
申请号：US11675565
申请日：2007-02-15
IPC分类号： H04L27/36
CPC分类号： H04L27/368 , H03C5/00 , H04L7/0029 , H04L7/0041 , H04L7/005 , H04L7/0079 , H04L7/02
摘要： A novel apparatus for and method of delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter. The invention provides a fully digital delay alignment mechanism where better than nanosecond alignment is achieved by accounting for processing delays in the digital circuit modules of the transmitter and by the use of programmable delay elements spread across several clock domains. Tapped delay lines compensate for propagation and settling delays in analog elements such as the DCO, dividers, quad switch, buffers, level shifters and digital pre-power amplifier (DPA). A signal correlative mechanism is provided whereby data from the amplitude and phase/frequency modulation paths to be matched is first interpolated and then cross-correlated to achieve accuracy better than the clock domain of comparison. Within the ADPLL portion of the transmitter, precise alignment of reference and direct point injection points in the ADPLL is provded using multiple clock domains, tapped delay lines and clock adjustment circuits.
摘要翻译： 数字极性发射机的幅度和相位/频率调制路径之间的延迟对准的新型装置和方法。 本发明提供了一种全数字延迟对准机构，其通过考虑发射机的数字电路模块中的处理延迟以及通过使用分布在几个时钟域上的可编程延迟元件来实现比纳秒对准更好的方法。 分接延迟线补偿模拟元件（如DCO，分频器，四通道开关，缓冲器，电平移位器和数字预功率放大器（DPA））中的传播和稳定延迟。 提供了一种信号相关机制，其中来自要匹配的幅度和相位/频率调制路径的数据首先被内插，然后进行交叉相关，以获得比时钟域更好的比较。 在发射机的ADPLL部分内，使用多个时钟域，抽头延迟线和时钟调整电路来证明ADPLL中的参考点和直接点注入点的精确对准。
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3.发明授权Linearization and calibration predistortion of a digitally controlled power amplifier 有权数字控制功率放大器的线性化和校准预失真公开(公告)号：US09020454B2
公开(公告)日：2015-04-28
申请号：US13481450
申请日：2012-05-25
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425
摘要： An apparatus and method of linearization of a digitally-controlled pre-power amplifier (DPA) and RF power amplifier (PA) for performing predistortion calibration to compensate for nonlinearlities in the DPA and PA circuits. A predistortion look up table (LUT) stores measured distortion compensation data that is applied to the TX data before being input to the digital-to-frequency converter (DFC), DPA and PA. The on-chip receiver, which is normally inactive during the TX burst in a half-duplex operation, demodulates the RF PA output and uses the digital I/Q RX outputs to perform calibration of the TX pre-distortion tables. A sample of the RF output signal is provided to the receiver chain. While the PA (DPA) code is increasing (or decreasing), the amplitude and phase of the recovered I/Q samples are used to determine the instantaneous value of the AM/AM and AM/PM pre-distortion from which an update to the predistortion tables may be computed.
摘要翻译： 用于执行预失真校准以补偿DPA和PA电路中的非线性的数字控制的预功率放大器（DPA）和RF功率放大器（PA）的线性化的装置和方法。 预失真查询表（LUT）存储在被输入到数字 - 频率转换器（DFC），DPA和PA之前施加到TX数据的测量失真补偿数据。 在半双工操作期间TX突发期间通常不工作的片上接收器解调RF PA输出并使用数字I / Q RX输出来执行TX预失真表的校准。 将RF输出信号的样本提供给接收器链。 当PA（DPA）代码正在增加（或减小）时，恢复的I / Q采样的振幅和相位用于确定AM / AM和AM / PM预失真的瞬时值， 可以计算预失真表。
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公开(公告)号：US20070190952A1
公开(公告)日：2007-08-16
申请号：US11675582
申请日：2007-02-15
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425
摘要： A novel apparatus and method of linearization of a digitally controlled pre-power amplifier (DPA) and RF power amplifier (PA). The mechanism is operative to perform predistortion calibration to compensate for nonlinearities in the DPA and PA circuits. A predistortion look up table (LUT) stores measured distortion compensation data that is applied to the TX data before being input to the digital to frequency converter (DFC), DPA and PA. The mechanism of the invention takes advantage of the on-chip receiver, which is normally inactive during the TX burst in a half-duplex operation, to demodulate the RF PA output and use the digital I/Q RX outputs to perform calibration of the TX pre-distortion tables. Controlled RF coupling is used to provide a sample of the RF output signal that to the receiver chain. The contents of the predistortion LUT are typically updated during the PA power up or down ramp. While the digitally-controlled PA (DPA) code is increasing (or decreasing), the amplitude and phase of the recovered I/Q samples are used to determine the instantaneous value of the AM/AM and AM/PM pre-distortion from which an update to the predistortion tables may be computed.
摘要翻译： 一种数字控制的预功率放大器（DPA）和RF功率放大器（PA）的线性化的新型装置和方法。 该机制可用于执行预失真校准，以补偿DPA和PA电路中的非线性。 预失真查询表（LUT）存储在被输入到数字到频率转换器（DFC），DPA和PA之前施加到TX数据的测量失真补偿数据。 本发明的机制利用在半双工操作期间的TX突发期间通常不工作的片上接收机来解调RF PA输出并使用数字I / Q RX输出来执行TX的校准 预失真表。 受控RF耦合用于向接收机链提供RF输出信号的采样。 预失真LUT的内容通常在PA上电或下降斜坡期间更新。 当数字控制的PA（DPA）码增加（或减小）时，恢复的I / Q采样的振幅和相位用于确定AM / AM和AM / PM预失真的瞬时值， 可以计算对预失真表的更新。
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公开(公告)号：US20120263256A1
公开(公告)日：2012-10-18
申请号：US13481450
申请日：2012-05-25
IPC分类号： H04L25/49
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425
摘要： An apparatus and method of linearization of a digitally-controlled pre-power amplifier (DPA) and RF power amplifier (PA) for performing predistortion calibration to compensate for nonlinearlities in the DPA and PA circuits. A predistortion look up table (LUT) stores measured distortion compensation data that is applied to the TX data before being input to the digital-to-frequency converter (DFC), DPA and PA. The on-chip receiver, which is normally inactive during the TX burst in a half-duplex operation, demodulates the RF PA output and uses the digital I/Q RX outputs to perform calibration of the TX pre-distortion tables. A sample of the RF output signal is provided to the receiver chain. While the PA (DPA) code is increasing (or decreasing), the amplitude and phase of the recovered I/Q samples are used to determine the instantaneous value of the AM/AM and AM/PM pre-distortion from which an update to the predistortion tables may be computed.
摘要翻译： 用于执行预失真校准以补偿DPA和PA电路中的非线性的数字控制的预功率放大器（DPA）和RF功率放大器（PA）的线性化的装置和方法。 预失真查询表（LUT）存储在被输入到数字 - 频率转换器（DFC），DPA和PA之前施加到TX数据的测量失真补偿数据。 在半双工操作期间TX突发期间通常不工作的片上接收器解调RF PA输出并使用数字I / Q RX输出来执行TX预失真表的校准。 将RF输出信号的样本提供给接收器链。 当PA（DPA）代码正在增加（或减小）时，恢复的I / Q采样的振幅和相位用于确定AM / AM和AM / PM预失真的瞬时值， 可以计算预失真表。
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公开(公告)号：US08195103B2
公开(公告)日：2012-06-05
申请号：US11675582
申请日：2007-02-15
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/3241 , H04B2001/0425
摘要： A novel apparatus and method of linearization of a digitally controlled pre-power amplifier (DPA) and RF power amplifier (PA). The mechanism is operative to perform predistortion calibration to compensate for nonlinearities in the DPA and PA circuits. A predistortion look up table (LUT) stores measured distortion compensation data that is applied to the TX data before being input to the digital to frequency converter (DFC), DPA and PA. The mechanism of the invention takes advantage of the on-chip receiver, which is normally inactive during the TX burst in a half-duplex operation, to demodulate the RF PA output and use the digital I/Q RX outputs to perform calibration of the TX pre-distortion tables. Controlled RF coupling is used to provide a sample of the RF output signal that to the receiver chain. The contents of the predistortion LUT are typically updated during the PA power up or down ramp. While the digitally-controlled PA (DPA) code is increasing (or decreasing), the amplitude and phase of the recovered I/Q samples are used to determine the instantaneous value of the AM/AM and AM/PM pre-distortion from which an update to the predistortion tables may be computed.
摘要翻译： 一种数字控制的预功率放大器（DPA）和RF功率放大器（PA）的线性化的新型装置和方法。 该机制可用于执行预失真校准，以补偿DPA和PA电路中的非线性。 预失真查询表（LUT）存储在被输入到数字到频率转换器（DFC），DPA和PA之前施加到TX数据的测量失真补偿数据。 本发明的机制利用在半双工操作期间TX突发期间通常不活动的片上接收机来解调RF PA输出并使用数字I / Q RX输出来执行TX的校准 预失真表。 受控RF耦合用于向接收机链提供RF输出信号的采样。 预失真LUT的内容通常在PA上电或下降斜坡期间更新。 当数字控制的PA（DPA）码增加（或减小）时，恢复的I / Q采样的振幅和相位用于确定AM / AM和AM / PM预失真的瞬时值， 可以计算对预失真表的更新。
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7.发明授权Predistortion methods and apparatus for transmitter linearization in a communication transceiver 有权用于通信收发器中发射机线性化的预失真方法和装置公开(公告)号：US08170507B2
公开(公告)日：2012-05-01
申请号：US12260832
申请日：2008-10-29
申请人： Yongtao Wang , Khurram Waheed , Sameh S. Rezeq , Jaimin Mehta , Prasad Srinivasan , Khurram Muhammad
发明人： Yongtao Wang , Khurram Waheed , Sameh S. Rezeq , Jaimin Mehta , Prasad Srinivasan , Khurram Muhammad
IPC分类号： H04B1/04
CPC分类号： H03F3/24 , H03F1/3241 , H03F3/72 , H04B2001/0425
摘要： Predistortion methods and apparatus for transmitter linearization in a communication transceiver are disclosed. An example apparatus to linearize a digitally controlled pre-power amplifier included in a transmitter of a communication transceiver disclosed herein comprises a predistorter to predistort an input signal to be processed by the digitally controlled pre-power amplifier, a coupling path within the communication transceiver to couple an output of the digitally controlled pre-power amplifier to an input of a receiver included in the communication transceiver without enabling an output power amplifier stage of a multi-stage power amplifier coupled to an output of the digitally controlled pre-power amplifier, wherein no additional hardware components are required to implement the coupling path within the communication transceiver, and a predistortion evaluator comprising a predistortion calibrator and a predistortion compensator to process data demodulated by the receiver to generate and update predistortion values for use by the predistorter.
摘要翻译： 公开了用于通信收发器中的发射机线性化的预失真方法和装置。 线性化包括在本文公开的通信收发器的发射机中的数字控制的预功率放大器的示例性装置包括预失真器，用于预失真由数字控制的预功率放大器处理的输入信号，通信收发器内的耦合路径 将数字控制的预功率放大器的输出耦合到通信收发器中包括的接收器的输入，而不使能耦合到数字控制的预功率放大器的输出的多级功率放大器的输出功率放大器级，其中 不需要额外的硬件组件来实现通信收发信机内的耦合路径，以及预失真评估器，包括预失真校准器和预失真补偿器，用于处理由接收机解调的数据，以生成和更新预失真值供预失真器使用。
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8.发明申请PREDISTORTION METHODS AND APPARATUS FOR TRANSMITTER LINEARIZATION IN A COMMUNICATION TRANSCEIVER 有权通信收发器中发射机线性化的预测方法和装置公开(公告)号：US20100105338A1
公开(公告)日：2010-04-29
申请号：US12260832
申请日：2008-10-29
申请人： Yongtao Wang , Khurram Waheed , Sameh S. Rezeq , Jaimin Mehta , Prasad Srinivasan , Khurram Muhammad
发明人： Yongtao Wang , Khurram Waheed , Sameh S. Rezeq , Jaimin Mehta , Prasad Srinivasan , Khurram Muhammad
CPC分类号： H03F3/24 , H03F1/3241 , H03F3/72 , H04B2001/0425
摘要： Predistortion methods and apparatus for transmitter linearization in a communication transceiver are disclosed. An example apparatus to linearize a digitally controlled pre-power amplifier included in a transmitter of a communication transceiver disclosed herein comprises a predistorter to predistort an input signal to be processed by the digitally controlled pre-power amplifier, a coupling path within the communication transceiver to couple an output of the digitally controlled pre-power amplifier to an input of a receiver included in the communication transceiver without enabling an output power amplifier stage of a multi-stage power amplifier coupled to an output of the digitally controlled pre-power amplifier, wherein no additional hardware components are required to implement the coupling path within the communication transceiver, and a predistortion evaluator comprising a predistortion calibrator and a predistortion compensator to process data demodulated by the receiver to generate and update predistortion values for use by the predistorter.
摘要翻译： 公开了用于通信收发器中的发射机线性化的预失真方法和装置。 线性化包括在本文公开的通信收发器的发射机中的数字控制的预功率放大器的示例性装置包括预失真器，用于预失真由数字控制的预功率放大器处理的输入信号，通信收发器内的耦合路径 将数字控制的预功率放大器的输出耦合到通信收发器中包括的接收器的输入，而不使能耦合到数字控制的预功率放大器的输出的多级功率放大器的输出功率放大器级，其中 不需要额外的硬件组件来实现通信收发信机内的耦合路径，以及预失真评估器，包括预失真校准器和预失真补偿器，用于处理由接收机解调的数据，以生成和更新预失真值供预失真器使用。
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9.发明申请Second-Order Polynomial, Interpolation-Based, Sampling Rate Converter and Method and Transmitters Employing the Same 审中-公开二阶多项式，基于插值的采样率转换器及其使用的方法和发送器公开(公告)号：US20080309524A1
公开(公告)日：2008-12-18
申请号：US12121090
申请日：2008-05-15
IPC分类号： H03M7/00
CPC分类号： H03H17/0685 , H03H17/028
摘要： A sampling rate converter, a method of performing digital sampling rate conversion and a wireless transmitter incorporating the filter or the method. In one embodiment, the sampling rate converter includes: (1) an input configured to receive digital data from a first clock domain sampled at a first sampling rate, (2) an output configured to provide digital data to a second clock domain sampled at a second sampling rate that differs from the first sampling rate and (3) a filter with a second-order, polynomial-based impulse response coupled to the input and the output and configured to apply coefficients having only one nonunitary divisor to the digital data from the first clock domain.
摘要翻译： 采样率转换器，执行数字采样率转换的方法和包含滤波器或方法的无线发射器。 在一个实施例中，采样率转换器包括：（1）被配置为从以第一采样率采样的第一时钟域接收数字数据的输入，（2）被配置为将数字数据提供给在 第二采样率与第一采样率不同，以及（3）具有耦合到输入和输出的二阶多项式的脉冲响应的滤波器，并且被配置为将仅具有一个非维数除数的系数应用于来自 第一个时钟域
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公开(公告)号：US20070188244A1
公开(公告)日：2007-08-16
申请号：US11618605
申请日：2006-12-29
IPC分类号： H03L7/00
CPC分类号： H03L7/099 , H03L7/10 , H03L2207/50
摘要： A novel apparatus for and method of harmonic characterization and ratio correction of device mismatch between coarse and fine varactor tuning devices within a segmented unified varactor bank of a radio frequency (RF) digitally controlled oscillator (DCO). The DCO uses a single unified bank of varactors that is divided into an MSB bank, LSB bank and sigma-delta (SD-LSB) bank. Any ratio mismatches between MSBs and LSBs are digitally calibrated out using a DCO step-size pre-distortion scheme wherein the LSB steps are adjusted to account for the ratio mismatch between the MSB/LSB step sizes. A harmonic characterization technique is used to estimate the mismatches in the minimal size CMOS tuning varactors of a digitally controlled RF oscillator (DCO), wherein the nominal ratio mismatch between the MSB and LSB devices is estimated using hybrid stochastic gradient DCO gain estimation algorithms. The nominal ratio mismatch and the mismatches in the MSB and LSB banks are used to determine the average MSB/LSB mismatch. The average mismatch value is then used to correct the LSB steps.
摘要翻译： 一种用于射频（RF）数字控制振荡器（DCO）的分段式统一变容管组内的粗调和精细变容二极管调谐装置之间的器件失配的谐波表征和比率校正的新型装置和方法。 DCO使用分为MSB库，LSB库和Σ-Δ（SD-LSB）库的单个统一的变容二极管组。 使用DCO步长预失真方案对MSB和LSB之间的任何比例不匹配进行数字校准，其中LSB步长被调整以考虑MSB / LSB步长之间的比率失配。 使用谐波表征技术来估计数字控制RF振荡器（DCO）的最小尺寸CMOS调谐变容二极管中的不匹配，其中使用混合随机梯度DCO增益估计算法来估计MSB和LSB器件之间的标称比率失配。 标称比例失配和MSB和LSB组中的不匹配用于确定平均MSB / LSB失配。 然后使用平均不匹配值来校正LSB步长。
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