Connecting unit to test semiconductor chips and apparatus to test semiconductor chips having the same
    1.
    发明授权
    Connecting unit to test semiconductor chips and apparatus to test semiconductor chips having the same 有权
    连接单元以测试半导体芯片和设备以测试具有相同的半导体芯片

    公开(公告)号:US08482308B2

    公开(公告)日:2013-07-09

    申请号:US12614504

    申请日:2009-11-09

    IPC分类号: G01R31/00 G01R31/28

    CPC分类号: G01R31/2886 G01R1/0408

    摘要: A connecting unit to test a semiconductor chip and an apparatus to test the semiconductor chip having the same include a plurality of connectors, on which a semiconductor chip having a certain pattern of electrical connection terminals, having a plurality of holes, cables configured to electrically connect the electrical connection terminals to the exterior, and coupling units configured to selectively electrically connect the cables to the electrical connection terminals through the holes. Therefore, it is possible to perform electrical tests of semiconductor chips having various patterns of electrical connection terminals and receive the semiconductor chips in a tray at a time.

    摘要翻译: 用于测试半导体芯片的连接单元和用于测试具有该连接器的半导体芯片的装置包括多个连接器,其上具有一定形式的电连接端子的半导体芯片具有多个孔,电缆被配置为电连接 电连接端子到外部,以及耦合单元,其被配置成选择性地将电缆电连接到电连接端子上。 因此,可以对具有各种电连接端子的图案的半导体芯片进行电气测试,并且一次接收托盘中的半导体芯片。

    Test carrier
    2.
    发明授权
    Test carrier 有权
    测试载体

    公开(公告)号:US07629788B2

    公开(公告)日:2009-12-08

    申请号:US12204627

    申请日:2008-09-04

    IPC分类号: G01R31/02

    CPC分类号: G01R31/2893 G01R1/04

    摘要: A test carrier includes an insert body, a first latch assembly including one or more first latches pivotally attached to the insert body, and a second latch assembly including one or more second latches pivotally attached to the insert body. The second latch assembly is configured to engage with an external connection terminal array of an electronic component during testing thereof. A method of testing a semiconductor device and a system for testing a semiconductor device are also provided.

    摘要翻译: 测试载体包括插入体,第一闭锁组件,其包括一个或多个可枢转地附接到插入体上的第一闩锁;以及第二闩锁组件,其包括一个或多个可枢转地附接到插入体上的第二闩锁。 第二闩锁组件构造成在其测试期间与电子部件的外部连接端子阵列接合。 还提供了测试半导体器件的方法和用于测试半导体器件的系统。

    Automatic tilt compensator and optical recording/reproducing apparatus having the same
    3.
    发明授权
    Automatic tilt compensator and optical recording/reproducing apparatus having the same 有权
    自动倾斜补偿器和具有其的光学记录/再现装置

    公开(公告)号:US06654326B1

    公开(公告)日:2003-11-25

    申请号:US09562918

    申请日:2000-05-02

    IPC分类号: G11B700

    CPC分类号: G11B7/0956 G11B7/08582

    摘要: An automatic tilt compensator senses and automatically compensates for a disc deformation while an optical recording and/or reproducing apparatus operates. The automatic tilt compensator of an optical recording/reproducing apparatus has a disc deformation detecting section for sensing a deformation direction and a deformation degree of a disc seated and rotated on a disc rotation unit of a deck base and for outputting a predetermined signal, and a level adjustment section for elevating and lowering a pair of guide shafts movably supporting a pickup unit on the deck base while being operated by the signal from the disc deformation detecting section, to thereby adjust the level of the pickup unit corresponding to the deformation degree of the disc. According to this, the level of the pickup unit according to the deformation direction or the deformation degree of the disc can be automatically adjusted while the optical recording/reproducing device is operated. Accordingly, even when a deformed disc is inserted, since the level of the pickup unit is automatically adjusted according to the deformed disc, errors in recording and reproducing information caused due to the deformed disc can be remarkably reduced.

    摘要翻译: 当光学记录和/或再现装置操作时,自动倾斜补偿器感测并自动补偿光盘变形。 光学记录/再现装置的自动倾斜补偿器具有盘变形检测部分,用于感测在甲板基座的盘旋转单元上安置和旋转的盘的变形方向和变形度,并输出预定信号, 水平调节部分,用于在由盘变形检测部分的信号操作的同时升降一对引导轴,该导向轴可移动地支撑在甲板基座上的拾取单元,从而调节与变形度对应的拾取单元的水平 光盘。 据此,可以在操作光记录/再现装置的同时,根据变形方向或盘的变形程度自动调节拾取单元的高度。 因此,即使插入变形的盘,由于拾取单元的水平根据变形的盘自动调节,所以可以显着地减少由于变形的盘引起的记录和再现信息的错误。

    Semiconductor device test apparatus
    4.
    发明申请
    Semiconductor device test apparatus 审中-公开
    半导体器件测试仪器

    公开(公告)号:US20100134135A1

    公开(公告)日:2010-06-03

    申请号:US12588901

    申请日:2009-11-02

    申请人: Jong-Pil Park

    发明人: Jong-Pil Park

    IPC分类号: G01R31/26

    CPC分类号: G01R31/2893

    摘要: A semiconductor device test apparatus may include a test handler using a customer tray and a test tray to sequentially transport a plurality of semiconductor devices to a loading part, a soak part, a test part, a desoak part, and an unloading part; and a test head electrically connected to the semiconductor devices in the test tray disposed in the test part to test electrical characteristics of the semiconductor devices. The test part is provided in the test handler such that the test tray is on an upper surface of the test handler. The test head is provided above the test handler such that a lower surface thereof having a test socket provided thereon faces the test part. The semiconductor devices in the test tray disposed in the test part of the test handler are electrically connected to the test socket by a downward movement of the test head.

    摘要翻译: 半导体器件测试装置可以包括使用顾客托盘和测试托盘的测试处理器,以将多个半导体器件顺序地传送到加载部件,浸泡部件,测试部件,脱卸部件和卸载部件; 以及测试头,电连接到设置在测试部件中的测试托盘中的半导体器件,以测试半导体器件的电特性。 测试部件设置在测试处理器中,使得测试托盘位于测试处理器的上表面上。 测试头设置在测试处理器的上方,使得其上设置有测试插座的下表面面向测试部件。 设置在测试处理器的测试部分中的测试托盘中的半导体器件通过测试头的向下移动而电连接到测试插座。