-
公开(公告)号:US20240304576A1
公开(公告)日:2024-09-12
申请号:US18586366
申请日:2024-02-23
Applicant: Kioxia Corporation
Inventor: Yuya KIYOMURA , Ayako KAWANISHI , Yuta TAGUCHI , Ayumi WATARAI , Ippei KUME
CPC classification number: H01L24/05 , H01L24/03 , H01L24/08 , H01L25/18 , H10B80/00 , H01L2224/03848 , H01L2224/05009 , H01L2224/05017 , H01L2224/05018 , H01L2224/05073 , H01L2224/05082 , H01L2224/05087 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05557 , H01L2224/05558 , H01L2224/05647 , H01L2224/08145 , H01L2924/1438
Abstract: A memory device includes a first chip including a first electrode and a second chip including a second electrode. The first electrode includes a first conductive film having a first surface in contact with the second electrode at a boundary region of the first and second electrodes, a second surface spaced apart from the boundary region, and a third surface between the first surface and the second surface, and having a first portion on the first surface side and a second portion on the second surface side, and includes a second conductive film covering the second surface and the third surface of the first conductive film. A (111) orientation ratio of copper contained in the first portion is higher than a (111) orientation ratio of copper contained in the second portion.
-
公开(公告)号:US20230088551A1
公开(公告)日:2023-03-23
申请号:US17687085
申请日:2022-03-04
Applicant: Kioxia Corporation
Inventor: Ippei KUME
IPC: G11C16/04 , H01L27/11524 , H01L27/11551 , H01L27/1157 , H01L27/11578
Abstract: According to one embodiment, a semiconductor memory device includes: a first chip including first conductive layers arranged at intervals in a first direction, a first semiconductor layer extending through an inside of the first conductive layers in the first direction, a first insulating film between the first semiconductor layer and the first conductive layers, a second semiconductor layer provided above the first conductive layers and in contact with the first semiconductor layer, and a first electrode provided in contact with an upper side of the second semiconductor layer; and a second chip including a second electrode in contact with the first electrode, and a second conductive layer in contact with the second electrode.
-
公开(公告)号:US20220084907A1
公开(公告)日:2022-03-17
申请号:US17116037
申请日:2020-12-09
Applicant: Kioxia Corporation
Inventor: Ippei KUME , Kazuhiko NAKAMURA , Shinya OKUDA
IPC: H01L23/48 , H01L21/02 , H01L21/768 , H01L21/3065 , H01L23/528
Abstract: A device includes a substrate having a first-face and a second-face. An electrode is provided in a through hole that penetrates through the substrate between the first-face and the second-face. A first-insulator is provided in the substrate and protrudes in a radial direction from an opening end of the through hole on a side close to the second-face to a center of the through hole as viewed from above the first-face. A second-insulator protrudes in the radial direction from the first-insulator as viewed from above the first-face, is thinner than the first-insulator, and is in contact with the electrode. A third-insulator is provided between an inner wall of the through hole and the electrode, and includes a first-portion that is in contact with the first-insulator and a second-portion that is in contact with the inner wall of the through hole and is closer to the second-face than the first-portion.
-
公开(公告)号:US20220189905A1
公开(公告)日:2022-06-16
申请号:US17350473
申请日:2021-06-17
Applicant: Kioxia Corporation
Inventor: Genki SAWADA , Masayoshi TAGAMI , Jun IIJIMA , Ippei KUME , Kiyomitsu YOSHIDA
Abstract: In one embodiment, a semiconductor device includes a first insulator. The device further includes a first pad provided in the first insulator, and including first and second layers provided on lateral and lower faces of the first insulator in order. The device further includes a second insulator provided on the first insulator. The device further includes a second pad provided on the first pad in the second insulator, and including third and fourth layers provided on lateral and upper faces of the second insulator in order. The device further includes a first portion provided between an upper face of the first pad and a lower face of the second insulator or between a lower face of the second pad and an upper face of the first insulator, and including a metal element same as a metal element included in the first layer or the third layer.
-
-
-