公开(公告)号：US20210072308A1

公开(公告)日：2021-03-11

申请号：US16807223

申请日：2020-03-03

Applicant: Kioxia Corporation

Inventor： Kazuhito HAYASAKA

IPC: G01R31/28

Abstract: A test system includes: a test board on which a plurality of test target devices are mounted while being sequentially connected to one another; a measuring apparatus configured to simultaneously execute direct current tests for the test target devices mounted on the test board; and a determining apparatus configured to determine whether or not the test target devices are acceptable. The measuring apparatus executes the direct current tests every time when the number of test target devices mounted on the test board changes. The measuring apparatus determines whether or not the test target devices are acceptable on the basis of a change between measured values of the direct current tests, which follows the change of the number of test target devices mounted on the test board.

公开(公告)号：US20230324455A1

公开(公告)日：2023-10-12

申请号：US18209398

申请日：2023-06-13

Applicant: Kioxia Corporation

Inventor： Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Masayuki MIURA ,  Arata INOUE ,  Hiroyuki DOHMAE ,  Koichi NAKAZAWA ,  Mitoshi MIYAOKA ,  Kazuhito HAYASAKA ,  Tomoya SANUKI

IPC: G01R31/28 ,  G01R1/073

CPC classification number: G01R31/2886 ,  G01R1/07342

Abstract: According to one embodiment, a wafer includes a substrate including a first region and a second region that do not overlap each other; a first chip unit and a second chip unit each arranged on the substrate; a first electrode and a second electrode each electrically connected to the first chip unit; and a third electrode and a fourth electrode each electrically connected to the second chip unit. The first electrode and the third electrode are arranged in the first region. The second electrode and the fourth electrode are arranged in the second region. The first region is independent of a region in which the first chip unit and the second chip unit are provided.

公开(公告)号：US20240014062A1

公开(公告)日：2024-01-11

申请号：US18371669

申请日：2023-09-22

Applicant: Kioxia Corporation

Inventor： Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Arata INOUE ,  Hiroyuki DOHMAE ,  Kazuhito HAYASAKA ,  Tomoya SANUKI

IPC: H01L21/677

CPC classification number: H01L21/67781 ,  H01L21/67766 ,  H01L21/67769 ,  H01L21/6773 ,  H01L21/68

Abstract: According to one embodiment, when a first case-mounted memory device that includes a first memory device is not connected to a slot of a host apparatus and is stored in a second stocker, the host apparatus causes a second transport device to transport the first case-mounted memory device to the slot, and to connect it thereto. When the first case-mounted memory device is not connected to the slot and is not stored in the second stocker, the host apparatus causes a first transport device to transport the first memory device from a first stocker to a mounter, causes the mounter to mount the first memory device in a case, and causes the second transport device to transport the first case-mounted memory device to the slot and to connect it thereto.

公开(公告)号：US20240014061A1

公开(公告)日：2024-01-11

申请号：US18371536

申请日：2023-09-22

Applicant: Kioxia Corporation

Inventor： Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Arata INOUE ,  Hiroyuki DOHMAE ,  Kazuhito HAYASAKA ,  Tomoya SANUKI

IPC: H01L21/677 ,  H01L21/67 ,  G01R1/073 ,  G01R1/067 ,  H01L21/66

CPC classification number: H01L21/67769 ,  H01L21/67248 ,  H01L21/67781 ,  H01L21/6773 ,  G01R1/07314 ,  G01R1/06755 ,  H01L22/32

Abstract: According to one embodiment, a cassette housing includes a storage unit, a probe card, and a container. The storage unit stores a semiconductor wafer including a plurality of nonvolatile memory chips. The probe card includes a probe. The probe is configured to be brought into contact with a pad electrode provided on the semiconductor wafer. The container contains heat transfer fluid for lowering or raising temperature of one or both of the probe card and the semiconductor wafer stored in the storage unit.