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公开(公告)号:US20240249106A1
公开(公告)日:2024-07-25
申请号:US18624312
申请日:2024-04-02
申请人: Kioxia Corporation
IPC分类号: G06K19/077 , G11C5/06 , G11C11/4074 , G11C16/02 , G11C16/30
CPC分类号: G06K19/07732 , G06K19/07733 , G06K19/07743 , G11C5/06 , G11C11/4074 , G11C16/02 , G11C16/30
摘要: According to one embodiment, there is provided a memory card including a first surface, a second surface, and 1st to Nth terminal groups. The first surface includes first to Nth rows, where N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1st to Nth terminal groups are placed in the first to Nth rows. The 1st terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kth terminal group, where K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.
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公开(公告)号:US20210055866A1
公开(公告)日:2021-02-25
申请号:US17076109
申请日:2020-10-21
申请人: Kioxia Corporation
摘要: According to one embodiment, a semiconductor memory device includes a housing and terminals. The housing has a first end edge extending in a first direction and a second end edge opposite to the first end edge. The terminals include signal terminals and include first terminals, second terminals, and third terminals. The first terminals are arranged in the first direction at a position close to the first end edge. The second terminals are arranged in the first direction with intervals at a position closer to the first end edge than the second end edge. The first plurality of terminals are closer to the first end edge than the second plurality of terminals are. The third terminals are arranged in the first direction with intervals at a position closer to the second end edge than the first end edge.
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公开(公告)号:US20240334631A1
公开(公告)日:2024-10-03
申请号:US18738605
申请日:2024-06-10
申请人: Kioxia Corporation
CPC分类号: H05K5/0247 , G06F1/187 , G06F13/4068 , G06F13/4221 , G11C5/04 , G06F2213/0026
摘要: According to one embodiment, a semiconductor memory device includes a housing and terminals. The housing has a first end edge extending in a first direction and a second end edge opposite to the first end edge. The terminals include signal terminals and include first terminals, second terminals, and third terminals. The first terminals are arranged in the first direction at a position close to the first end edge. The second terminals are arranged in the first direction with intervals at a position closer to the first end edge than the second end edge. The first plurality of terminals are closer to the first end edge than the second plurality of terminals are. The third terminals are arranged in the first direction with intervals at a position closer to the second end edge than the first end edge.
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公开(公告)号:US20210334617A1
公开(公告)日:2021-10-28
申请号:US17369449
申请日:2021-07-07
申请人: Kioxia Corporation
IPC分类号: G06K19/077
摘要: According to one embodiment, there is provided a memory card including a first surface, a second surface, and 1st to Nth terminal groups. The first surface includes first to Nth rows, where N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1st to Nth terminal groups are placed in the first to Nth rows. The 1st terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kth terminal group, where K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.
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公开(公告)号:US20200090020A1
公开(公告)日:2020-03-19
申请号:US16619012
申请日:2018-03-09
申请人: Kioxia Corporation
IPC分类号: G06K19/077
摘要: A memory card includes a first surface, a second surface, and 1st to Nth terminal groups. The first surface includes first to Nth rows, wherein N is an integer of two or greater. The second surface faces the opposite side from the first surface. The 1st to Nth terminal groups are placed in the first to Nth rows. The 1st terminal group includes terminals to which differential clock signals are assigned, terminals to which single-ended signals are assigned, and a terminal to which a first power supply voltage is assigned. Kth terminal group, wherein K is an integer no smaller than two and no greater than N, includes terminals to which differential data signals are assigned.
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