公开(公告)号：US11075122B2

公开(公告)日：2021-07-27

申请号：US16811065

申请日：2020-03-06

Applicant: Kioxia Corporation

Inventor： Tomonari Shioda ,  Takashi Ishida

IPC: H01L21/8234 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11582

Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate including a first surface, a first contact part provided at a deeper level than the first surface, and a second contact part protruding up to a higher level than the first surface from the first contact part; a stacked body in which insulating layers and electrode layers are alternately stacked on the first surface; and a semiconductor film extending, on the second contact part, in the stacked body in a first direction perpendicular to the first surface. At an interface between the first contact part and the second contact part, a length of the first contact part in a second direction parallel to the first surface is larger than a length of the second contact part in the second direction.

公开(公告)号：US11980031B2

公开(公告)日：2024-05-07

申请号：US17128915

申请日：2020-12-21

Applicant: Kioxia Corporation

Inventor： Takashi Ishida ,  Yoshiaki Fukuzumi ,  Takayuki Okada ,  Masaki Tsuji

IPC: H01L29/792 ,  H01L21/336 ,  H01L27/115 ,  H01L29/10 ,  H01L29/423 ,  H01L29/788 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L29/1037 ,  H01L29/4234 ,  H10B43/10 ,  H10B43/35

Abstract: According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.

公开(公告)号：US11574681B2

公开(公告)日：2023-02-07

申请号：US17190856

申请日：2021-03-03

Applicant: Kioxia Corporation

Inventor： Takashi Ishida ,  Hiroshi Kanno

IPC: G11C16/14 ,  G11C16/04 ,  G11C16/30 ,  G11C16/08 ,  G11C16/24

Abstract: A semiconductor storage device includes a plurality of memory cell transistors, a first wiring electrically connected to the plurality of memory cell transistors, and an erasing circuitry. The erasing circuitry is configured to erase data stored in the memory cell transistors by applying a first voltage to the first wiring, and apply the first voltage such that the first voltage rises to a first value, then falls from the first value to a second value, and is then maintained at the second value.