公开(公告)号：US20240311003A1

公开(公告)日：2024-09-19

申请号：US18599914

申请日：2024-03-08

Applicant: Kioxia Corporation

Inventor： Kohei OIKAWA ,  Youhei FUKAZAWA ,  Keiri NAKANISHI ,  Sho Kodama ,  Takashi TAKEMOTO

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0673

Abstract: According to one embodiment, a memory controller includes a parameter table having entries which respectively correspond to superblock address ranges. The memory controller translates a logical address of data to be written to the memory into a superblock address, calculates compression parameters which correspond to items of data to be written to superblock addresses, writes the compression parameters to the parameter table, and compress data using the parameter table.

公开(公告)号：US20240094940A1

公开(公告)日：2024-03-21

申请号：US18460284

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Kensaku YAMAGUCHI ,  Kiyotaka IWASAKI ,  Takashi TAKEMOTO ,  Kohei OIKAWA

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0608 ,  G06F3/0679

Abstract: A memory system includes a non-volatile memory and a controller. The controller is configured to perform a write operation of a first data cluster and a first partial overwrite operation of the first data cluster with first overwrite data. The write operation includes compressing and then encrypting the first data cluster, and writing the compressed and encrypted first data cluster into a first physical location of the non-volatile memory. The first partial overwrite operation includes encrypting the first overwrite data without performing compression, reading the compressed and encrypted first data cluster from the first physical location of the non-volatile memory, generating a first composite data cluster with the compressed and encrypted first data cluster read from the first physical location and the encrypted first overwrite data that is not compressed, and writing the first composite data cluster into a second physical location of the non-volatile memory.

公开(公告)号：US20240303188A1

公开(公告)日：2024-09-12

申请号：US18593215

申请日：2024-03-01

Applicant: Kioxia Corporation

Inventor： Takashi TAKEMOTO ,  Kensaku YAMAGUCHI ,  Keiri NAKANISHI ,  Kohei OIKAWA ,  Sho KODAMA

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F12/0253 ,  G06F2212/7201

Abstract: A memory system includes a nonvolatile memory and a controller. The controller is configured to maintain an address mapping table including first mapping information indicating correspondence between logical addresses and physical addresses of the nonvolatile memory in units of physical regions each having a predetermined size. The controller, during a write operation compresses write data of the predetermined size into a compressed write data, determines a physical address range in which the compressed write data is to be written, writes the compressed write data into the physical address range and also second mapping information into an area in one or more physical regions spanned by the physical address range, and updates the address mapping table. The second mapping information indicates a logical address of the write data, an information capable of specifying an offset, and a size of the compressed write data.

公开(公告)号：US20230305718A1

公开(公告)日：2023-09-28

申请号：US17899398

申请日：2022-08-30

Applicant: KIOXIA CORPORATION

Inventor： Takashi TAKEMOTO ,  Kensaku YAMAGUCHI

IPC: G06F3/06

CPC classification number: G06F3/0623 ,  G06F3/0658 ,  G06F3/0679

Abstract: A memory system includes a nonvolatile memory and a controller. The controller is configured to segment data into clusters, perform a compression with respect to each of the clusters, allocate the clusters subjected to the compression to encoding frames in accordance with a predetermined rule. According to the predetermined rule, at least a part of a cluster is allocated to a vacant space of an encoding frame in a first state, when a predetermined condition is met, and an entirety of a cluster is allocated to an encoding frame in a second state, when no encoding frame in the first state exists or when the predetermined condition is not met. The controller is further configured to encode data in each of the encoding frames and write the encoded data into the nonvolatile memory.

公开(公告)号：US20230291418A1

公开(公告)日：2023-09-14

申请号：US17939692

申请日：2022-09-07

Applicant: Kioxia Corporation

Inventor： Masato SUMIYOSHI ,  Takashi TAKEMOTO ,  Keiri NAKANISHI

IPC: H03M7/40 ,  H03M7/30

CPC classification number: H03M7/405 ,  H03M7/6005

Abstract: According to one embodiment, a data decompression device decodes a code included in compressed data into a symbol. The data decompression device includes a first code length generation unit and a second code length generation unit. The first code length generation unit generates a first code length of a first code included in the compressed data by arithmetic calculation. The second code length generation unit generates a second code length of a second code by using a table. The second code is included in the compressed data. The second code is subsequent to the first code. The table indicates at least the first code and the second code length that is associated with the first code.

公开(公告)号：US20230142767A1

公开(公告)日：2023-05-11

申请号：US17903636

申请日：2022-09-06

Applicant: Kioxia Corporation

Inventor： Keiri NAKANISHI ,  Kensaku YAMAGUCHI ,  Takashi TAKEMOTO

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0631 ,  G06F3/0659 ,  G06F3/0679

Abstract: According to one embodiment, a controller of a memory system manages a first table maintaining a relationship between a logical address and a physical address, compresses first data corresponding to a first address of a write command, specifies a size of second data obtained by compressing the first data, determines allocation of the second data on a memory based on the size of the second data, stores a second address corresponding to a physical area where a head of the second data is stored and a physical area number used to store the second data in an entry of the first logical address in the first table, and stores the first address, offset of a position of a leader of the second data in the physical area, and the size of the second data in the physical area.

公开(公告)号：US20250013759A1

公开(公告)日：2025-01-09

申请号：US18743458

申请日：2024-06-14

Applicant: Kioxia Corporation

Inventor： Keiri NAKANISHI ,  Takaya OGAWA ,  Takashi TAKEMOTO ,  Kohei OIKAWA

IPC: G06F21/60

Abstract: A controller of a memory system includes circuitry that generates a first compression unit that is calculated based on first namespace setting information indicating setting of a write-destination namespace, and corresponds to the write-destination namespace. The first compression unit has a size satisfying a constraint that an encryption key for encrypting data to be written into the write-destination namespace is not switched in the first compression unit.

公开(公告)号：US20230412190A1

公开(公告)日：2023-12-21

申请号：US18178437

申请日：2023-03-03

Applicant: Kioxia Corporation

Inventor： Takashi TAKEMOTO

IPC: H03M7/30 ,  G06F3/06

CPC classification number: H03M7/30 ,  G06F3/0679 ,  G06F3/064 ,  G06F3/0608

Abstract: An entropy code encoder includes a register and first, second, third, and fourth arithmetic circuits. The first arithmetic circuit is configured to output, based on an input symbol, a first value corresponding to an appearance frequency of the input symbol and a second value corresponding to a cumulative distribution of the first value. The second arithmetic circuit is configured to output a third value corresponding to division of a value of bits in the register by the first value. The third arithmetic circuit is configured to output a fourth value obtained by adding the second value to a bit-shifted value of the third value, to update a value in the register. The fourth arithmetic circuit is configured to compare the value of upper bits in the register and the first value and output a value of lower bits in the register as a compressed data stream.