公开(公告)号：US20210398946A1

公开(公告)日：2021-12-23

申请号：US17187712

申请日：2021-02-26

Applicant: KIOXIA CORPORATION

Inventor： Takeori MAEDA ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/15 ,  H01L23/14 ,  H01L21/50

Abstract: According to one or more embodiments, a semiconductor device includes a support having a recess. A plurality of semiconductor chips are stacked on each other in the recess. A plurality of columnar electrodes in the recess extend from the semiconductor chips toward an opening of the support. A wiring layer is disposed over the opening. The recess is filled with an insulating material to cover the semiconductor chips and the columnar electrodes.

公开(公告)号：US20220375901A1

公开(公告)日：2022-11-24

申请号：US17682925

申请日：2022-02-28

Applicant: KIOXIA CORPORATION

Inventor： Susumu YAMAMOTO ,  Tsutomu FUJITA ,  Takeori MAEDA ,  Satoshi HONGO ,  Gen TOYOTA ,  Eiichi SHIN ,  Yukio KATAMURA

IPC: H01L25/065 ,  H01L23/552 ,  H01L25/00

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of stacked bodies on a substrate, each of the stacked bodies includes a plurality of semiconductor chips. The method further includes forming a plurality of first wires on the stacked bodies. The first wires connecting the stacked bodies to each other. The method further includes forming a resin layer on the stacked bodies and the first wires, then thinning he resin layer until the first wires are exposed.

公开(公告)号：US20210257336A1

公开(公告)日：2021-08-19

申请号：US17007849

申请日：2020-08-31

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Yuusuke TAKANO ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L21/306 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the at least one side surface. The first adhesive layer and the first resin layer contact each other.

公开(公告)号：US20240087970A1

公开(公告)日：2024-03-14

申请号：US18463807

申请日：2023-09-08

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Tetsuya KUROSAWA

IPC: H01L23/14 ,  H01L21/52 ,  H01L21/683 ,  H01L23/10 ,  H01L23/538

CPC classification number: H01L23/142 ,  H01L21/52 ,  H01L21/6836 ,  H01L23/10 ,  H01L23/5384

Abstract: According to one embodiment, a semiconductor device includes a wiring board, an adhesive, a semiconductor module, and a sealing member. The wiring board includes a step at an outer peripheral. The adhesive is provided on the wiring board. The semiconductor module is disposed on the adhesive. The semiconductor module is mounted inward from the step of the wiring board. The sealing member covers the step, a side surface of the adhesive, and the semiconductor module. The step includes a side surface and a bottom surface. The side surface faces an outside of the wiring board. The bottom surface extends from a lower end of the side surface toward an end part of the wiring board. The side surface of the step and the side surface of the adhesive are positioned to overlap with one another in a view from a stacking direction of the adhesive and the semiconductor module.

公开(公告)号：US20220013477A1

公开(公告)日：2022-01-13

申请号：US17189718

申请日：2021-03-02

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA ,  Tatsuo MIGITA ,  Masayuki MIURA ,  Takeori MAEDA ,  Kazuhiro KATO ,  Susumu YAMAMOTO

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor device includes a semiconductor chip having a first face and a second face on an opposite side to the first face, and including semiconductor elements arranged on the first face. Columnar electrodes are arranged above the first face, and electrically connected to any of the semiconductor elements. A first member is located around the columnar electrodes above the first face. An insulant covers the columnar electrodes and the first member. The first member is harder than the columnar electrodes and the insulant. The first member and the columnar electrodes are exposed from a surface of the insulant.

公开(公告)号：US20220216184A1

公开(公告)日：2022-07-07

申请号：US17701328

申请日：2022-03-22

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Yuusuke TAKANO ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L21/306 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the t least one side surface. The first adhesive layer and the first resin layer contact each other.

公开(公告)号：US20230307422A1

公开(公告)日：2023-09-28

申请号：US18325769

申请日：2023-05-30

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/14 ,  H01L21/50 ,  H01L23/15

CPC classification number: H01L25/0657 ,  H01L23/5386 ,  H01L23/142 ,  H01L21/50 ,  H01L23/15 ,  H01L2021/60022

Abstract: According to one or more embodiments, a semiconductor device includes a support having a recess. A plurality of semiconductor chips are stacked on each other in the recess. A plurality of columnar electrodes in the recess extend from the semiconductor chips toward an opening of the support. A wiring layer is disposed over the opening. The recess is filled with an insulating material to cover the semiconductor chips and the columnar electrodes.