公开(公告)号：US20230307422A1

公开(公告)日：2023-09-28

申请号：US18325769

申请日：2023-05-30

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/14 ,  H01L21/50 ,  H01L23/15

CPC classification number: H01L25/0657 ,  H01L23/5386 ,  H01L23/142 ,  H01L21/50 ,  H01L23/15 ,  H01L2021/60022

Abstract: According to one or more embodiments, a semiconductor device includes a support having a recess. A plurality of semiconductor chips are stacked on each other in the recess. A plurality of columnar electrodes in the recess extend from the semiconductor chips toward an opening of the support. A wiring layer is disposed over the opening. The recess is filled with an insulating material to cover the semiconductor chips and the columnar electrodes.

公开(公告)号：US20210257332A1

公开(公告)日：2021-08-19

申请号：US17005186

申请日：2020-08-27

Applicant: KIOXIA CORPORATION

Inventor： Soichi HOMMA

IPC: H01L23/00 ,  H01L25/18 ,  H01L21/56

Abstract: A semiconductor device includes a substrate having a plurality of pads on a surface of the substrate, a semiconductor chip that includes a plurality of metal bumps connected to corresponding pads on the substrate, a first resin layer between the surface of the substrate and the semiconductor chip, a second resin layer between the substrate and the semiconductor chip and between the first resin layer and at least one of the metal bumps, and a third resin layer on the substrate and above the semiconductor chip.

公开(公告)号：US20210257336A1

公开(公告)日：2021-08-19

申请号：US17007849

申请日：2020-08-31

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Yuusuke TAKANO ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L21/306 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the at least one side surface. The first adhesive layer and the first resin layer contact each other.

公开(公告)号：US20240186262A1

公开(公告)日：2024-06-06

申请号：US18460521

申请日：2023-09-01

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA

IPC: H01L23/552 ,  G01N21/25 ,  H01L21/311 ,  H01L21/56

CPC classification number: H01L23/552 ,  G01N21/255 ,  H01L21/31116 ,  H01L21/56 ,  H01L24/48

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes etching a sealing resin so that a filler inside the resin is exposed at an outer surface of the resin. The manufacturing method further includes determining the exposed amount of the filler after etching by measuring the optical properties of the surface of the resin. Additional etching may then be performed, if necessary, such that the appropriate amount of filler is exposed from the resin. In subsequent steps, a conductive film may be deposited on the surface of the resin. For example, the conductive film may be used as shield layer of the semiconductor device.

公开(公告)号：US20210398946A1

公开(公告)日：2021-12-23

申请号：US17187712

申请日：2021-02-26

Applicant: KIOXIA CORPORATION

Inventor： Takeori MAEDA ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/15 ,  H01L23/14 ,  H01L21/50

Abstract: According to one or more embodiments, a semiconductor device includes a support having a recess. A plurality of semiconductor chips are stacked on each other in the recess. A plurality of columnar electrodes in the recess extend from the semiconductor chips toward an opening of the support. A wiring layer is disposed over the opening. The recess is filled with an insulating material to cover the semiconductor chips and the columnar electrodes.

公开(公告)号：US20210082856A1

公开(公告)日：2021-03-18

申请号：US16909171

申请日：2020-06-23

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00

Abstract: A semiconductor device according to an embodiment of the present invention comprises pads electrically connected to wires provided on an insulating substrate. A wiring substrate comprises a first insulant provided between the pads. A first semiconductor chip comprises metal bumps respectively connected to the pads on the wiring substrate on a first face facing the wiring substrate. A first adhesion layer is provided between the first insulant and the first semiconductor chip and adheres the wiring substrate and the first semiconductor chip to each other. An insulating resin is provided to cover peripheries of the first adhesion layer and the metal bumps between the wiring substrate and the first semiconductor chip, and a structure on the wiring substrate.

公开(公告)号：US20230307419A1

公开(公告)日：2023-09-28

申请号：US17821632

申请日：2022-08-23

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA ,  Chikara MIYAZAKI

IPC: H01L25/065 ,  H01L25/18 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L25/18 ,  H01L21/568 ,  H01L24/95 ,  H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2225/06562 ,  H01L2225/06517 ,  H01L2224/11312 ,  H01L2224/11464 ,  H01L2224/11002 ,  H01L2224/11013 ,  H01L2224/95 ,  H01L2224/13018 ,  H01L2224/13147 ,  H01L2224/13111 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/8121 ,  H01L2224/81951 ,  H01L2225/06506 ,  H01L2224/48145 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L24/45 ,  H01L2224/48105 ,  H01L24/48 ,  H01L2224/11831

Abstract: A semiconductor device of an embodiment includes: a first semiconductor element; a first insulating resin that seals the first semiconductor element; a wiring substrate having a pad; a first wiring that extends from the first semiconductor element toward the wiring substrate, and has a first head portion and a first column portion, the first column portion connected to the first semiconductor element and the first head portion exposed on a surface of the first insulating resin; and a first conductive bonding agent that electrically connects the first head portion of the first wiring and the pad. When a surface of the first head portion facing a side of the first insulating resin is defined as a first surface. A surface of the first insulating resin on a side of the wiring substrate is defined as a second surface. A distance from a surface of the wiring substrate on a side of the first insulating resin to the first surface is defined as a first distance, and a distance from a surface of the wiring substrate on the side of the first insulating resin to the second surface is defined as a second distance. The first distance is shorter than the second distance.

公开(公告)号：US20230005879A1

公开(公告)日：2023-01-05

申请号：US17944018

申请日：2022-09-13

Applicant: KIOXIA CORPORATION

Inventor： Soichi HOMMA

IPC: H01L23/00 ,  H01L25/065

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a metal bump on a first surface side of a semiconductor chip, positioning the semiconductor chip so the metal bump contacts a pad of an interconnection substrate, and applying a first light from a second surface side of the semiconductor chip and melting the metal bump with the first light. After the melting, the melted metal bump is allowed to resolidify by stopping or reducing the application of the first light. The semiconductor chip is then pressed toward the interconnection substrate. A second light is then applied from the second surface side of the semiconductor chip while the semiconductor chip is being pressed toward the interconnection substrate to melt the metal bump. After the melting, the melted metal bump is allowed to resolidify by the stopping or reducing of the application of the second light.

公开(公告)号：US20220216184A1

公开(公告)日：2022-07-07

申请号：US17701328

申请日：2022-03-22

Applicant: Kioxia Corporation

Inventor： Takeori MAEDA ,  Yuusuke TAKANO ,  Soichi HOMMA

IPC: H01L25/065 ,  H01L21/306 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L25/00

Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the t least one side surface. The first adhesive layer and the first resin layer contact each other.

公开(公告)号：US20230089223A1

公开(公告)日：2023-03-23

申请号：US17681487

申请日：2022-02-25

Applicant: Kioxia Corporation

Inventor： Soichi HOMMA ,  Kazuma HASEGAWA

IPC: H01L25/065 ,  H01L25/00

Abstract: A semiconductor device includes: an interconnect substrate including a plurality of interconnect layers; a first semiconductor chip disposed over the interconnect substrate; a second semiconductor chip disposed over the first semiconductor chip in a shifted manner and including a plurality of metal bumps on a surface of the second semiconductor chip facing the interconnect substrate; and a plurality of columnar electrodes connecting the interconnect structure to the metal bumps.