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公开(公告)号:US11605548B2
公开(公告)日:2023-03-14
申请号:US17396053
申请日:2021-08-06
Applicant: Kioxia Corporation
Inventor: Takeori Maeda , Ryoji Matsushima , Makoto Kawaguchi , Masaaki Wakui
IPC: H01L21/67 , B29C45/03 , B29C45/02 , B29C45/14 , B29C45/77 , B29C45/78 , B29C45/80 , B29C45/34 , H01L21/687 , B29L31/34
Abstract: According to one embodiment, a mold includes a substrate clamping surface, a cavity, a suction part, a vent, an intermediate cavity, and an opening/closing part. The substrate clamping surface contacts a surface of a processing substrate. The cavity is recessed from the substrate clamping surface. The suction part is recessed from the substrate clamping surface. The vent is provided on a path between the cavity and the suction part, communicates with the cavity, is recessed from the substrate clamping surface to a vent depth. The intermediate cavity is provided between the vent and the suction part on the path, communicates with the vent, and is recessed from the substrate clamping surface to an intermediate cavity depth deeper than the vent depth. The opening/closing part opens and closes the path and is provided between the intermediate cavity and the suction part on the path.
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公开(公告)号:US11929332B2
公开(公告)日:2024-03-12
申请号:US17189718
申请日:2021-03-02
Applicant: Kioxia Corporation
Inventor: Soichi Homma , Tatsuo Migita , Masayuki Miura , Takeori Maeda , Kazuhiro Kato , Susumu Yamamoto
IPC: H01L25/065 , H01L23/00 , H01L25/00 , H01L25/18
CPC classification number: H01L23/562 , H01L24/13 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/13026 , H01L2225/06548 , H01L2225/06562 , H01L2225/06586 , H01L2924/1431 , H01L2924/14511 , H01L2924/3511
Abstract: A semiconductor device includes a semiconductor chip having a first face and a second face on an opposite side to the first face, and including semiconductor elements arranged on the first face. Columnar electrodes are arranged above the first face, and electrically connected to any of the semiconductor elements. A first member is located around the columnar electrodes above the first face. An insulant covers the columnar electrodes and the first member. The first member is harder than the columnar electrodes and the insulant. The first member and the columnar electrodes are exposed from a surface of the insulant.
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公开(公告)号:US11705436B2
公开(公告)日:2023-07-18
申请号:US17701328
申请日:2022-03-22
Applicant: Kioxia Corporation
Inventor: Takeori Maeda , Yuusuke Takano , Soichi Homma
IPC: H01L25/065 , H01L21/306 , H01L21/48 , H01L21/56 , H01L21/78 , H01L25/00
CPC classification number: H01L25/0657 , H01L21/30625 , H01L21/4853 , H01L21/563 , H01L21/78 , H01L25/50 , H01L2225/0651 , H01L2225/06506 , H01L2225/06517 , H01L2225/06562 , H01L2225/06575 , H01L2225/06582
Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the t least one side surface. The first adhesive layer and the first resin layer contact each other.
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公开(公告)号:US11302675B2
公开(公告)日:2022-04-12
申请号:US17007849
申请日:2020-08-31
Applicant: Kioxia Corporation
Inventor: Takeori Maeda , Yuusuke Takano , Soichi Homma
IPC: H01L21/48 , H01L25/065 , H01L21/306 , H01L21/56 , H01L21/78 , H01L25/00
Abstract: A semiconductor device includes a first semiconductor chip having a first surface and a second surface; a first adhesive layer on the first surface; a second semiconductor chip that includes a third surface and a fourth surface, and a connection bump on the third surface. The connection bump is coupled to the first adhesive layer. The semiconductor device includes a wiring substrate connected to the connection bump. The semiconductor device includes a first resin layer covering the connection bump between the second semiconductor chip and the wiring substrate, and covers one side surface of the second semiconductor chip connecting the third surface and the fourth surface. The first adhesive layer covers an upper portion of the at least one side surface. The first resin layer covers a lower portion of the at least one side surface. The first adhesive layer and the first resin layer contact each other.
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