公开(公告)号：US20110260311A1

公开(公告)日：2011-10-27

申请号：US13176118

申请日：2011-07-05

申请人： Kiyoshi SAITO ,  Yuji Umetani ,  Hideaki Yoshimi

发明人： Kiyoshi SAITO ,  Yuji Umetani ,  Hideaki Yoshimi

IPC分类号： H01L23/495

CPC分类号： H01L23/49541 ,  H01L21/4842 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012

摘要： This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes bonding a semiconductor die on an island in a lead frame, electrically connecting the semiconductor die with the lead frame, resin-molding the lead frame on which the semiconductor die is bonded, and applying prior to the resin-molding a compressive pressure that is higher than a clamping pressure applied in the resin-molding to a region of the lead frame being clamped by molds in the resin-molding of the lead frame.

摘要翻译： 本发明的目的在于提供一种制造树脂模制半导体器件的方法，该方法通过防止由于通过冲压形成的引线框上的毛刺而发生树脂泄漏部分而产生高可靠性。 根据本发明的制造树脂模制半导体器件的方法包括将引线框架中的岛上的半导体管芯接合，将半导体管芯与引线框架电连接，树脂模制其上结合有半导体管芯的引线框架， 并且在树脂模制之前将在树脂模制品中施加的夹紧压力的压缩压力施加到引线框架的树脂模制中由模具夹紧的引线框架的区域。

公开(公告)号：US20100052138A1

公开(公告)日：2010-03-04

申请号：US12539939

申请日：2009-08-12

申请人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

发明人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

IPC分类号： H01L23/31 ,  H01L21/56

CPC分类号： H01L23/49541 ,  H01L21/4842 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012

摘要： This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes bonding a semiconductor die on an island in a lead frame, electrically connecting the semiconductor die with the lead frame, resin-molding the lead frame on which the semiconductor die is bonded, and applying prior to the resin-molding a compressive pressure that is higher than a clamping pressure applied in the resin-molding to a region of the lead frame being clamped by molds in the resin-molding of the lead frame.

摘要翻译： 本发明的目的在于提供一种制造树脂模制半导体器件的方法，该方法通过防止由于通过冲压形成的引线框上的毛刺而发生树脂泄漏部分而产生高可靠性。 根据本发明的制造树脂模制半导体器件的方法包括将引线框架中的岛上的半导体管芯接合，将半导体管芯与引线框架电连接，树脂模制其上结合有半导体管芯的引线框架， 并且在树脂模制之前将在树脂模制品中施加的夹紧压力的压缩压力施加到引线框架的树脂模制中由模具夹紧的引线框架的区域。

公开(公告)号：US08648452B2

公开(公告)日：2014-02-11

申请号：US13176118

申请日：2011-07-05

申请人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

发明人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

IPC分类号： H01L23/495

CPC分类号： H01L23/49541 ,  H01L21/4842 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012

摘要： This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes bonding a semiconductor die on an island in a lead frame, electrically connecting the semiconductor die with the lead frame, resin-molding the lead frame on which the semiconductor die is bonded, and applying prior to the resin-molding a compressive pressure that is higher than a clamping pressure applied in the resin-molding to a region of the lead frame being clamped by molds in the resin-molding of the lead frame.

摘要翻译： 本发明的目的在于提供一种制造树脂模制半导体器件的方法，该方法通过防止由于通过冲压形成的引线框上的毛刺而发生树脂泄漏部分而产生高可靠性。 根据本发明的制造树脂模制半导体器件的方法包括将引线框架中的岛上的半导体管芯接合，将半导体管芯与引线框架电连接，树脂模制其上结合有半导体管芯的引线框架， 并且在树脂模制之前将在树脂模制品中施加的夹紧压力的压缩压力施加到引线框架的树脂模制中由模具夹紧的引线框架的区域。

公开(公告)号：US07998794B2

公开(公告)日：2011-08-16

申请号：US12539939

申请日：2009-08-12

申请人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

发明人： Kiyoshi Saito ,  Yuji Umetani ,  Hideaki Yoshimi

IPC分类号： H01L21/00

CPC分类号： H01L23/49541 ,  H01L21/4842 ,  H01L23/49548 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012

摘要： This invention is directed to provide a method of manufacturing a resin molded semiconductor device with high reliability by preventing a resin leakage portion from occurring due to burrs on a lead frame formed by punching. The method of manufacturing the resin molded semiconductor device according to the invention includes bonding a semiconductor die on an island in a lead frame, electrically connecting the semiconductor die with the lead frame, resin-molding the lead frame on which the semiconductor die is bonded, and applying prior to the resin-molding a compressive pressure that is higher than a clamping pressure applied in the resin-molding to a region of the lead frame being clamped by molds in the resin-molding of the lead frame.

摘要翻译： 本发明的目的在于提供一种制造树脂模制半导体器件的方法，该方法通过防止由于通过冲压形成的引线框上的毛刺而发生树脂泄漏部分而产生高可靠性。 根据本发明的制造树脂模制半导体器件的方法包括将引线框架中的岛上的半导体管芯接合，将半导体管芯与引线框架电连接，树脂模制其上结合有半导体管芯的引线框架， 并且在树脂模制之前将在树脂模制品中施加的夹紧压力的压缩压力施加到引线框架的树脂模制中由模具夹紧的引线框架的区域。

公开(公告)号：US08736047B2

公开(公告)日：2014-05-27

申请号：US11692596

申请日：2007-03-28

申请人： Hideaki Yoshimi ,  Mitsuo Umemoto ,  Kazumi Onda ,  Kazumi Horinaka

发明人： Hideaki Yoshimi ,  Mitsuo Umemoto ,  Kazumi Onda ,  Kazumi Horinaka

IPC分类号： H01L23/10 ,  H01L23/34 ,  H01L23/367

CPC分类号： H01L21/78 ,  H01L23/367 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate; a heat sink mounted on an upper surface of the semiconductor substrate; wirings formed on a lower surface of the semiconductor substrate; and the like. The heat sink is mounted on the upper surface of the semiconductor substrate, and a planar size thereof is approximately the same as that of the semiconductor substrate. Moreover, the heat sink has a thickness of 500 μm to 2 mm, and may be formed to be thicker than the semiconductor substrate. By using the heat sink to reinforce the substrate, a thickness of the semiconductor substrate can be reduced to, for example, about 50 μm. As a result, a thickness of the entire semiconductor device can be reduced.

摘要翻译： 半导体器件包括：半导体衬底; 安装在所述半导体衬底的上表面上的散热器; 形成在半导体衬底的下表面上的布线; 等等。 散热器安装在半导体衬底的上表面上，其平面尺寸与半导体衬底大致相同。 此外，散热器的厚度为500μm〜2mm，可以形成为比半导体基板厚。 通过使用散热器来加强基板，可以将半导体基板的厚度减小到例如约50μm。 结果，可以减小整个半导体器件的厚度。

公开(公告)号：US20070228554A1

公开(公告)日：2007-10-04

申请号：US11692596

申请日：2007-03-28

申请人： Hideaki Yoshimi ,  Mitsuo Umemoto ,  Kazumi Onda ,  Kazumi Horinaka

发明人： Hideaki Yoshimi ,  Mitsuo Umemoto ,  Kazumi Onda ,  Kazumi Horinaka

IPC分类号： H01L23/34

CPC分类号： H01L21/78 ,  H01L23/367 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate; a heat sink mounted on an upper surface of the semiconductor substrate; wirings formed on a lower surface of the semiconductor substrate; and the like. The heat sink is mounted on the upper surface of the semiconductor substrate, and a planar size thereof is approximately the same as that of the semiconductor substrate. Moreover, the heat sink has a thickness of 500 μm to 2 mm, and may be formed to be thicker than the semiconductor substrate. By using the heat sink to reinforce the substrate, a thickness of the semiconductor substrate can be reduced to, for example, about 50 μm. As a result, a thickness of the entire semiconductor device can be reduced.

摘要翻译： 半导体器件包括：半导体衬底; 安装在所述半导体衬底的上表面上的散热器; 形成在半导体衬底的下表面上的布线; 等等。 散热器安装在半导体衬底的上表面上，其平面尺寸与半导体衬底大致相同。 此外，散热器的厚度为500μm至2mm，并且可以形成为比半导体衬底更厚。 通过使用散热器来加强基板，可以将半导体基板的厚度减小到例如约50μm。 结果，可以减小整个半导体器件的厚度。