公开(公告)号：US09165898B2

公开(公告)日：2015-10-20

申请号：US12346667

申请日：2008-12-30

申请人： Kojiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto

发明人： Kojiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L21/768 ,  H01L23/31 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a pad electrode formed on a semiconductor substrate through a first insulation layer, and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein the via hole includes a first opening of which a diameter in a portion close to the pad electrode is larger than a diameter in a portion close to the back surface of the semiconductor substrate, and a second opening formed in the first insulation layer and continuing from the first opening, of which a diameter in a portion close to the pad electrode is smaller than a diameter in a portion close to the front surface of the semiconductor substrate.

摘要翻译： 提供了可靠性提高的半导体器件及其制造方法。 本发明的半导体器件包括通过第一绝缘层形成在半导体衬底上的焊盘电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中通孔包括 第一开口部，其靠近焊盘电极的部分的直径大于靠近半导体基板的背面的部分的直径;以及第二开口，形成在第一绝缘层中并与第一开口连续， 其中靠近焊盘电极的部分的直径小于靠近半导体衬底的前表面的部分的直径。

公开(公告)号：US08697494B2

公开(公告)日：2014-04-15

申请号：US13241517

申请日：2011-09-23

申请人： Chang-Seong Jeon ,  Ho-Geon Song ,  Mitsuo Umemoto ,  Sang-Sick Park

发明人： Chang-Seong Jeon ,  Ho-Geon Song ,  Mitsuo Umemoto ,  Sang-Sick Park

IPC分类号： H01L21/00

CPC分类号： H01L24/74 ,  H01L21/67 ,  H01L23/16 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32151 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/7501 ,  H01L2224/7515 ,  H01L2224/7525 ,  H01L2224/75252 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/7598 ,  H01L2224/7901 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/8385 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/53178 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed.

摘要翻译： 制造倒装芯片封装的方法和装置包括将焊剂点到封装衬底的第一预备凸块上，通过焊剂将第一半导体芯片的初步凸点附着到封装衬底的第一初步凸块上，点焊焊剂 封装衬底的第二初步凸块，以及通过焊剂将第二半导体芯片的预备凸块附接到封装衬底的第二初级凸块。 因此，可以抑制在封装衬底的初步凸块上的焊剂的蒸发。

公开(公告)号：US20120100668A1

公开(公告)日：2012-04-26

申请号：US13241517

申请日：2011-09-23

申请人： Chang-Seong Jeon ,  Ho-Geon Song ,  Mitsuo Umemoto ,  Sang-Sick Park

发明人： Chang-Seong Jeon ,  Ho-Geon Song ,  Mitsuo Umemoto ,  Sang-Sick Park

IPC分类号： H01L21/50 ,  B23P19/00

CPC分类号： H01L24/74 ,  H01L21/67 ,  H01L23/16 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32151 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/7501 ,  H01L2224/7515 ,  H01L2224/7525 ,  H01L2224/75252 ,  H01L2224/75804 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/7598 ,  H01L2224/7901 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/8385 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  Y10T29/53178 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method and apparatus to manufacture a flip chip package includes dotting a flux on a first preliminary bump of a package substrate, attaching a preliminary bump of a first semiconductor chip to the first preliminary bump of the package substrate via the flux, dotting a flux on a second preliminary bump of the package substrate, and attaching a preliminary bump of a second semiconductor chip to the second preliminary bump of the package substrate via the flux. Accordingly, an evaporation of the flux on the preliminary bump of the package substrate may be suppressed.

摘要翻译： 制造倒装芯片封装的方法和装置包括将焊剂点到封装衬底的第一预备凸块上，通过焊剂将第一半导体芯片的初步凸点附着到封装衬底的第一初步凸块上，点焊焊剂 封装衬底的第二初步凸块，以及通过焊剂将第二半导体芯片的预备凸块附接到封装衬底的第二初级凸块。 因此，可以抑制在封装衬底的初步凸块上的焊剂的蒸发。

公开(公告)号：US20090141275A1

公开(公告)日：2009-06-04

申请号：US12327066

申请日：2008-12-03

申请人： Il-Young HAN ,  Mitsuo Umemoto ,  Ki-Kwon Jeong ,  Young-shin Choi

发明人： Il-Young HAN ,  Mitsuo Umemoto ,  Ki-Kwon Jeong ,  Young-shin Choi

IPC分类号： G01B11/00 ,  B32B37/12

CPC分类号： G01B11/272 ,  B32B37/06 ,  B32B37/1018 ,  B32B38/1841 ,  B32B41/00 ,  B32B2310/028 ,  B32B2457/08

摘要： A method of inspecting the alignment of a second structure with respect to a first structure, including emitting light from a first plane of a first structure to a second plane of a second structure in a first direction perpendicular to the first plane of the first structure, the first plane and the second plane facing each other. The incident light can be reflected from the second plane toward the first plane in a second direction parallel with the first direction. The position of the reflected light can be detected to inspect the alignment of the second structure with respect to the first structure.

摘要翻译： 一种检查第二结构相对于第一结构的对准的方法，包括在垂直于第一结构的第一平面的第一方向上将光从第一结构的第一平面发射到第二结构的第二平面， 第一平面和第二平面彼此面对。 入射光可以在与第一方向平行的第二方向上从第二平面朝向第一平面反射。 可以检测反射光的位置，以检查第二结构相对于第一结构的对准。

公开(公告)号：US07485967B2

公开(公告)日：2009-02-03

申请号：US11362503

申请日：2006-02-27

申请人： Kojiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto

发明人： Kojiro Kameyama ,  Akira Suzuki ,  Yoshio Okayama ,  Mitsuo Umemoto

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/11 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a pad electrode formed on a semiconductor substrate through a first insulation layer, and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein the via hole includes a first opening of which a diameter in a portion close to the pad electrode is larger than a diameter in a portion close to the back surface of the semiconductor substrate, and a second opening formed in the first insulation layer and continuing from the first opening, of which a diameter in a portion close to the pad electrode is smaller than a diameter in a portion close to the front surface of the semiconductor substrate.

摘要翻译： 提供了可靠性提高的半导体器件及其制造方法。 本发明的半导体器件包括通过第一绝缘层形成在半导体衬底上的焊盘电极和形成在半导体衬底中并从半导体衬底的背表面延伸到焊盘电极的通孔，其中通孔包括 第一开口部，其靠近焊盘电极的部分的直径大于靠近半导体基板的背面的部分的直径;以及第二开口，形成在第一绝缘层中并与第一开口连续， 其中靠近焊盘电极的部分的直径小于靠近半导体衬底的前表面的部分的直径。

公开(公告)号：US07397128B2

公开(公告)日：2008-07-08

申请号：US11392802

申请日：2006-03-28

申请人： Hirotoshi Kubo ,  Yukari Shirahata ,  Shigehito Matsumoto ,  Masamichi Yamamuro ,  Koujiro Kameyama ,  Mitsuo Umemoto

发明人： Hirotoshi Kubo ,  Yukari Shirahata ,  Shigehito Matsumoto ,  Masamichi Yamamuro ,  Koujiro Kameyama ,  Mitsuo Umemoto

IPC分类号： H01L23/48

CPC分类号： H01L29/7322 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/4824 ,  H01L23/4951 ,  H01L23/49562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/17 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L29/1004 ,  H01L29/41708 ,  H01L29/66272 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05684 ,  H01L2224/13099 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/0781 ,  H01L2924/12033 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/351 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

摘要： Disclosed is a semiconductor device in which emitter pad electrodes connected to an active region, collector and base pad electrodes are formed on a surface of a semiconductor substrate. Furthermore, on a back surface of the semiconductor substrate, a backside electrode is formed. Moreover, the emitter pad electrodes connected to a grounding potential are connected to the backside electrode through feedthrough electrodes penetrating the semiconductor substrate in a thickness direction.

摘要翻译： 公开了一种半导体器件，其中连接到有源区，集电极和基极焊盘电极的发射极焊盘电极形成在半导体衬底的表面上。 此外，在半导体衬底的背面形成有背面电极。 此外，连接到接地电位的发射极焊盘电极通过穿过半导体衬底的厚度方向的穿通电极而连接到背面电极。

公开(公告)号：US20080132038A1

公开(公告)日：2008-06-05

申请号：US11969065

申请日：2008-01-03

申请人： Kojiro Kameyama ,  Akira Suzuki ,  Mitsuo Umemoto

发明人： Kojiro Kameyama ,  Akira Suzuki ,  Mitsuo Umemoto

IPC分类号： H01L21/304 ,  H01L21/4763

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/351 ,  Y10S438/978 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

摘要： The invention is directed to a semiconductor device having a penetrating electrode and a manufacturing method thereof in which reliability and a yield of the semiconductor device are enhanced. A semiconductor substrate is etched to form a via hole from a back surface of the semiconductor substrate to a pad electrode. This etching is performed under an etching condition such that an opening diameter of the via hole at its bottom is larger than a width of the pad electrode. Next, a second insulation film is formed on the back surface of the semiconductor substrate including in the via hole 16, exposing the pad electrode at the bottom of the via hole. Next, a penetrating electrode and a wiring layer are formed, being electrically connected with the pad electrode exposed at the bottom of the via hole 16. Furthermore, a protection layer and a conductive terminal are formed. Finally, the semiconductor substrate is cut and separated in semiconductor dies by dicing.

摘要翻译： 本发明涉及一种具有穿透电极的半导体器件及其制造方法，其中提高了半导体器件的可靠性和产量。 蚀刻半导体衬底以从半导体衬底的背表面到焊盘电极形成通孔。 该蚀刻在蚀刻条件下进行，使得其底部的通孔的开口直径大于焊盘电极的宽度。 接下来，在包括在通孔16中的半导体衬底的背面上形成第二绝缘膜，使通孔底部的焊盘电极露出。 接下来，形成贯通电极和布线层，与在通孔16的底部露出的焊盘电极电连接。 此外，形成保护层和导电端子。 最后，通过切割在半导体管芯中切割和分离半导体衬底。

公开(公告)号：US07235428B2

公开(公告)日：2007-06-26

申请号：US10704608

申请日：2003-11-12

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2224/05611 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166

摘要： A semiconductor device production method including: the step of forming a stopper mask layer of a first metal on a semiconductor substrate, the stopper mask layer having an opening at a predetermined position thereof; the metal supplying step of supplying a second metal into the opening of the stopper mask layer to form a projection electrode of the second metal; and removing the stopper mask layer after the metal supplying step.

摘要翻译： 一种半导体器件制造方法，包括：在半导体衬底上形成第一金属的阻挡掩模层的步骤，所述阻挡掩模层在其预定位置具有开口; 所述金属供给步骤将第二金属供给到所述阻挡掩模层的开口中，以形成所述第二金属的突起电极; 以及在金属供给步骤之后移除止动掩模层。

公开(公告)号：US20060131741A1

公开(公告)日：2006-06-22

申请号：US11353192

申请日：2006-02-14

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L23/34

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

摘要翻译： 本发明实现了具有电极的多个半导体芯片通过低熔点金属部件彼此连接的封装结构中的电极之间的优异的电气和机械连接。 凸起电极形成在第一半导体芯片的前表面上。 穿透孔形成在第二半导体芯片中，并且在每个穿透孔中形成有在中心具有间隙的穿透电极。 低熔点金属构件插入在凸块电极和穿透电极的连接面之间，并且每个低熔点金属构件的一部分在溶解时在贯通电极的每个间隙中流动。 这防止了在相邻的凸起电极之间的低熔点金属构件供应过大引起的突起电极之间的短路。

公开(公告)号：US20060108691A1

公开(公告)日：2006-05-25

申请号：US11260682

申请日：2005-10-28

申请人： Kojiro Kameyama ,  Akira Suzuki ,  Mitsuo Umemoto

发明人： Kojiro Kameyama ,  Akira Suzuki ,  Mitsuo Umemoto

IPC分类号： H01L23/52

CPC分类号： H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/02 ,  H01L24/10 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/16 ,  H01L2924/01078 ,  H01L2924/04941

摘要： The first pad electrode layer is disposed on the surface of the semiconductor substrate with the first insulating film between them. Then, the second insulating film with the first via hole partially exposing the first pad electrode layer is formed over the first pad electrode layer. The plug is formed in the first via hole in the next process. The second pad electrode layer connected to the plug is disposed on the second insulating film. Next, the second via hole reaching to the first pad electrode layer from the backside of the semiconductor substrate is formed. The penetrating electrode and the second wiring layer connected to the first pad electrode layer at the bottom part of the second via hole are disposed. Furthermore, the protecting layer and the conductive terminal are formed. Finally, the semiconductor substrate is diced into the semiconductor chips.

摘要翻译： 第一焊盘电极层设置在半导体衬底的表面上，其间具有第一绝缘膜。 然后，在第一焊盘电极层上形成具有部分地露出第一焊盘电极层的第一通孔的第二绝缘膜。 在下一个过程中，插头形成在第一通孔中。 连接到插头的第二焊盘电极层设置在第二绝缘膜上。 接下来，形成从半导体基板的背面到达第一焊盘电极层的第二通孔。 设置在第二通孔的底部连接到第一焊盘电极层的穿透电极和第二布线层。 此外，形成保护层和导电端子。 最后，将半导体衬底切成半导体芯片。