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    Semiconductor device with fin-type field effect transistor and manufacturing method thereof.
    1.
    发明授权
    Semiconductor device with fin-type field effect transistor and manufacturing method thereof. 失效
    具有鳍式场效应晶体管的半导体器件及其制造方法。

    公开(公告)号：US07719043B2

    公开(公告)日：2010-05-18

    申请号：US11632352

    申请日：2005-07-04

    申请人： Shigeharu Yamagami ,  Hitoshi Wakabayashi ,  Risho Koh ,  Kiyoshi Takeuchi ,  Masahiro Nomura ,  Koichi Takeda ,  Koichi Terashima ,  Masayasu Tanaka ,  Katsuhiko Tanaka

    发明人： Shigeharu Yamagami ,  Hitoshi Wakabayashi ,  Risho Koh ,  Kiyoshi Takeuchi ,  Masahiro Nomura ,  Koichi Takeda ,  Koichi Terashima ,  Masayasu Tanaka ,  Katsuhiko Tanaka

    IPC分类号： H01L27/108 ,  H01L29/94

    CPC分类号： H01L21/84 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/7851

    摘要： The present invention relates to a semiconductor device including a Fin type field effect transistor (FET) having a protrusive semiconductor layer protruding from a substrate plane, a gate electrode formed so as to straddle the protrusive semiconductor layer, a gate insulating film between the gate electrode and the protrusive semiconductor layer, and source and drain regions provided in the protrusive semiconductor layer, wherein the semiconductor device has on a semiconductor substrate an element forming region having a Fin type FET, a trench provided on the semiconductor substrate for separating the element forming region from another element forming region, and an element isolation insulating film in the trench; the element forming region has a shallow substrate flat surface formed by digging to a depth shallower than the bottom surface of the trench and deeper than the upper surface of the semiconductor substrate, a semiconductor raised portion protruding from the substrate flat surface and formed of a part of the semiconductor substrate, and an insulating film on the shallow substrate flat surface; and the protrusive semiconductor layer of the Fin type FET is formed of a portion protruding from the insulating film of the semiconductor raised portion.

    摘要翻译： 本发明涉及一种半导体器件，其包括具有从衬底平面突出的突出半导体层的鳍型场效应晶体管（FET），形成为跨越突出半导体层的栅极电极，栅极电极 所述突出半导体层以及设置在所述突出半导体层中的源极和漏极区域，其中所述半导体器件在半导体衬底上具有具有鳍型FET的元件形成区域，设置在所述半导体衬底上的沟槽，用于将所述元件形成区域 来自另一个元件形成区域，以及沟槽中的元件隔离绝缘膜; 元件形成区域具有通过挖掘到比沟槽的底表面浅的深度而比半导体衬底的上表面更深的深浅的衬底平坦表面，从衬底平坦表面突出并形成的半导体凸起部分 的半导体衬底，以及在浅衬底平面上的绝缘膜; 并且鳍式FET的突出半导体层由从半导体凸起部分的绝缘膜突出的部分形成。

    Fin-type field effect transistor, semiconductor device and manufacturing process therefor
    2.
    发明申请
    Fin-type field effect transistor, semiconductor device and manufacturing process therefor 有权
    鳍型场效应晶体管，半导体器件及其制造工艺

    公开(公告)号：US20090134454A1

    公开(公告)日：2009-05-28

    申请号：US11921685

    申请日：2006-06-05

    申请人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    发明人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L21/84 ,  H01L27/1203 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/785

    摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode comprising an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion comprises an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.

    摘要翻译： 通过形成包括檐结构的栅电极，通过离子注入将均匀的掺杂剂浓度保持在半导体内，可以在源极/漏极区之间保持恒定的距离而不提供栅极侧壁。 结果，可以获得元件性能和操作性能优异的FinFET。 一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及 突起包括由在半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

    Field effect transistor and method for producing the same
    3.
    发明申请
    Field effect transistor and method for producing the same 审中-公开
    场效应晶体管及其制造方法

    公开(公告)号：US20070158700A1

    公开(公告)日：2007-07-12

    申请号：US10587845

    申请日：2005-01-28

    申请人： Risho Koh ,  Katsuhiko Tanaka ,  Kiyoshi Takeuchi

    发明人： Risho Koh ,  Katsuhiko Tanaka ,  Kiyoshi Takeuchi

    IPC分类号： H01L29/76

    CPC分类号： H01L29/785 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7854 ,  H01L29/78609

    摘要： A field effect transistor comprising: a semiconductor layer projecting from the plane of a base; a gate electrode provided on opposite side surfaces of the semiconductor layer; a gate insulating film interposed between the gate electrode and the side surface of the semiconductor layer; and source/drain regions where a first conductivity type impurity is introduced, wherein the semiconductor layer has a channel forming region in a portion sandwiched between the source/drain regions, and has in the upper part of the semiconductor layer in the channel forming region a channel impurity concentration adjusting region of which the concentration of a second conductivity type impurity is higher than that in the lower part of the semiconductor layer, and in the channel impurity concentration adjusting region, a channel is formed in a side surface portion facing the gate insulating film of the semiconductor layer in the channel impurity concentration adjusting region in a state of operation in which a signal voltage is applied to the gate electrode.

    摘要翻译： 一种场效应晶体管，包括：从基底的平面突出的半导体层; 设置在所述半导体层的相对侧表面上的栅电极; 介于栅电极和半导体层的侧表面之间的栅极绝缘膜; 以及引入第一导电型杂质的源极/漏极区域，其中半导体层在夹在源极/漏极区域之间的部分中具有沟道形成区域，并且在沟道形成区域a中的半导体层的上部 沟道杂质浓度调整区域，其中第二导电类型杂质的浓度高于半导体层的下部，并且在沟道杂质浓度调节区域中，在面向栅极绝缘体的侧表面部分中形成沟道 在对栅电极施加信号电压的工作状态下的沟道杂质浓度调整区域中的半导体层的膜。

    Fin-type field effect transistor and semiconductor device
    4.
    发明授权
    Fin-type field effect transistor and semiconductor device 有权
    鳍型场效应晶体管和半导体器件

    公开(公告)号：US07859065B2

    公开(公告)日：2010-12-28

    申请号：US11921685

    申请日：2006-06-05

    申请人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    发明人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    IPC分类号： H01L27/088

    CPC分类号： H01L21/84 ,  H01L27/1203 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/785

    摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode comprising an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion comprises an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.

    摘要翻译： 通过形成包括檐结构的栅电极，通过离子注入将均匀的掺杂剂浓度保持在半导体内，可以在源极/漏极区之间保持恒定的距离而不提供栅极侧壁。 结果，可以获得元件性能和操作性能优异的FinFET。 一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及 突起包括由在半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

    Semiconductor device and manufacturing method thereof
    5.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07830703B2

    公开(公告)日：2010-11-09

    申请号：US11570037

    申请日：2005-05-25

    申请人： Koichi Takeda ,  Masahiro Nomura ,  Kiyoshi Takeuchi ,  Hitoshi Wakabayashi ,  Shigeharu Yamagami ,  Risho Koh ,  Koichi Terashima ,  Katsuhiko Tanaka ,  Masayasu Tanaka

    发明人： Koichi Takeda ,  Masahiro Nomura ,  Kiyoshi Takeuchi ,  Hitoshi Wakabayashi ,  Shigeharu Yamagami ,  Risho Koh ,  Koichi Terashima ,  Katsuhiko Tanaka ,  Masayasu Tanaka

    IPC分类号： G11C11/00

    CPC分类号： H01L27/11 ,  H01L27/1104 ,  H01L27/1108 ,  H01L29/785 ,  Y10S257/903

    摘要： A semiconductor device having SRAM cell units each comprising a pair of a first driving transistor and a second driving transistor, a pair of a first load transistor and a second load transistor, and a pair of a first access transistor and a second access transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; and the first and second driving transistors each have a channel width larger than that of at least either each of the load transistors or each of the access transistors.

    摘要翻译： 一种具有SRAM单元单元的半导体器件，每个SRAM单元包括一对第一驱动晶体管和第二驱动晶体管，一对第一负载晶体管和第二负载晶体管，以及一对第一存取晶体管和第二存取晶体管，其中 每个晶体管包括从衬底平面向上突出的半导体层，在半导体层的相对侧上延伸以跨越半导体层的顶部的栅极电极，插入在栅极电极和半导体之间的栅极绝缘膜 层，以及形成在半导体层中的一对源极/漏极区域; 并且第一和第二驱动晶体管的沟道宽度均大于至少任一个负载晶体管或每个存取晶体管的沟道宽度。

    Semiconductor Device And Manufacturing Method Thereof
    6.
    发明申请
    Semiconductor Device And Manufacturing Method Thereof 有权
    半导体器件及其制造方法

    公开(公告)号：US20080079077A1

    公开(公告)日：2008-04-03

    申请号：US11570037

    申请日：2005-05-25

    申请人： Koichi Takeda ,  Masahiro Nomura ,  Kiyoshi Takeuchi ,  Hitoshi Wakabayashi ,  Shigeharu Yamagami ,  Risho Koh ,  Koichi Terashima ,  Katsuhiko Tanaka ,  Masayasu Tanaka

    发明人： Koichi Takeda ,  Masahiro Nomura ,  Kiyoshi Takeuchi ,  Hitoshi Wakabayashi ,  Shigeharu Yamagami ,  Risho Koh ,  Koichi Terashima ,  Katsuhiko Tanaka ,  Masayasu Tanaka

    IPC分类号： H01L27/12 ,  H01L21/84

    CPC分类号： H01L27/11 ,  H01L27/1104 ,  H01L27/1108 ,  H01L29/785 ,  Y10S257/903

    摘要： A semiconductor device having SRAM cell units each comprising a pair of a first driving transistor and a second driving transistor, a pair of a first load transistor and a second load transistor, and a pair of a first access transistor and a second access transistor, wherein each of the transistors comprises a semiconductor layer projecting upward from a substrate plane, a gate electrode extending on opposite sides of the semiconductor layer so as to stride over a top of the semiconductor layer, a gate insulating film interposed between the gate electrode and the semiconductor layer, and a pair of source/drain areas formed in the semiconductor layer; and the first and second driving transistors each have a channel width larger than that of at least either each of the load transistors or each of the access transistors.

    摘要翻译： 一种具有SRAM单元单元的半导体器件，每个SRAM单元包括一对第一驱动晶体管和第二驱动晶体管，一对第一负载晶体管和第二负载晶体管，以及一对第一存取晶体管和第二存取晶体管，其中 每个晶体管包括从衬底平面向上突出的半导体层，在半导体层的相对侧上延伸以跨越半导体层的顶部的栅极电极，插入在栅极电极和半导体之间的栅极绝缘膜 层，以及形成在半导体层中的一对源极/漏极区域; 并且第一和第二驱动晶体管的沟道宽度均大于至少任一个负载晶体管或每个存取晶体管的沟道宽度。

    Manufacturing process of fin-type field effect transistor and semiconductor
    8.
    发明授权
    Manufacturing process of fin-type field effect transistor and semiconductor 失效
    鳍型场效应晶体管和半导体的制造工艺

    公开(公告)号：US08247294B2

    公开(公告)日：2012-08-21

    申请号：US12946034

    申请日：2010-11-15

    申请人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    发明人： Kiyoshi Takeuchi ,  Katsuhiko Tanaka

    IPC分类号： H01L21/336

    CPC分类号： H01L21/84 ,  H01L27/1203 ,  H01L29/42384 ,  H01L29/66795 ,  H01L29/785

    摘要： A constant distance can be maintained between source/drain regions without providing a gate side wall by forming a gate electrode including an eaves structure, and a uniform dopant concentration is kept within a semiconductor by ion implantation. As a result, a FinFET excellent in element properties and operation properties can be obtained. A field effect transistor, wherein a gate structure body is a protrusion that protrudes toward source and drain regions sides in a channel length direction and has a channel length direction width larger than that of the part adjacent to the insulating film in a gate electrode, and the protrusion includes an eaves structure formed by the protrusion that extends in a gate electrode extending direction on the top surface of the semiconductor layer.

    摘要翻译： 通过形成包括屋顶结构的栅极电极，可以在源/漏区之间保持恒定的距离，而不需要提供栅极侧壁，并且通过离子注入将均匀的掺杂剂浓度保持在半导体内。 结果，可以获得元件性能和操作性能优异的FinFET。 一种场效应晶体管，其中栅极结构体是在沟道长度方向上朝向源极和漏极区域侧突出的突起，并且沟道长度方向宽度大于栅电极中与绝缘膜相邻的部分的沟道长度方向宽度;以及 突起包括由半导体层的顶表面上沿栅电极延伸方向延伸的突起形成的檐结构。

    Semiconductor Device and Method for Production Thereof
    9.
    发明申请
    Semiconductor Device and Method for Production Thereof 失效
    半导体器件及其制造方法

    公开(公告)号：US20080029821A1

    公开(公告)日：2008-02-07

    申请号：US11632352

    申请日：2005-07-04

    申请人： Shigeharu Yamagami ,  Hitoshi Wakabayashi ,  Risho Koh ,  Kiyoshi Takeuchi ,  Masahiro Nomura ,  Koichi Takeda ,  Koichi Terashima ,  Masayasu Tanaka ,  Katsuhiko Tanaka

    发明人： Shigeharu Yamagami ,  Hitoshi Wakabayashi ,  Risho Koh ,  Kiyoshi Takeuchi ,  Masahiro Nomura ,  Koichi Takeda ,  Koichi Terashima ,  Masayasu Tanaka ,  Katsuhiko Tanaka

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L21/84 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/7851

    摘要： The present invention relates to a semiconductor device including a Fin type field effect transistor (FET) having a protrusive semiconductor layer protruding from a substrate plane, a gate electrode formed so as to straddle the protrusive semiconductor layer, a gate insulating film between the gate electrode and the protrusive semiconductor layer, and source and drain regions provided in the protrusive semiconductor layer, wherein the semiconductor device has on a semiconductor substrate an element forming region having a Fin type FET, a trench provided on the semiconductor substrate for separating the element forming region from another element forming region, and an element isolation insulating film in the trench; the element forming region has a shallow substrate flat surface formed by digging to a depth shallower than the bottom surface of the trench and deeper than the upper surface of the semiconductor substrate, a semiconductor raised portion protruding from the substrate flat surface and formed of a part of the semiconductor substrate, and an insulating film on the shallow substrate flat surface; and the protrusive semiconductor layer of the Fin type FET is formed of a portion protruding from the insulating film of the semiconductor raised portion.

    摘要翻译： 本发明涉及一种半导体器件，其包括具有从衬底平面突出的突出半导体层的鳍型场效应晶体管（FET），形成为跨越突出半导体层的栅极电极，栅极电极 所述突出半导体层以及设置在所述突出半导体层中的源极和漏极区域，其中所述半导体器件在半导体衬底上具有具有鳍型FET的元件形成区域，设置在所述半导体衬底上的沟槽，用于将所述元件形成区域 来自另一个元件形成区域，以及沟槽中的元件隔离绝缘膜; 元件形成区域具有通过挖掘到比沟槽的底表面浅的深度而比半导体衬底的上表面更深的深浅的衬底平坦表面，从衬底平坦表面突出并形成的半导体凸起部分 的半导体衬底，以及在浅衬底平面上的绝缘膜; 并且鳍式FET的突出半导体层由从半导体凸起部分的绝缘膜突出的部分形成。