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22 条记录 (耗时 0.023 秒)

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110095430A1

    公开(公告)日：2011-04-28

    申请号：US12984142

    申请日：2011-01-04

    申请人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    发明人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    IPC分类号： H01L23/485

    CPC分类号： H01L23/585 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

    摘要翻译： 一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强 靠近密封圈。 芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层 使用通孔部分。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08237281B2

    公开(公告)日：2012-08-07

    申请号：US12984142

    申请日：2011-01-04

    申请人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    发明人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    IPC分类号： H01L23/495

    CPC分类号： H01L23/585 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

    摘要翻译： 一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强 靠近密封圈。 芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层 使用通孔部分。

    Semiconductor device having sealing ring
    4.
    发明授权
    Semiconductor device having sealing ring 有权
    具有密封环的半导体器件

    公开(公告)号：US08164163B2

    公开(公告)日：2012-04-24

    申请号：US12029969

    申请日：2008-02-12

    申请人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    发明人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    IPC分类号： H01L23/544

    CPC分类号： H01L23/585 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.

    摘要翻译： 半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。 当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。

    Semiconductor device having seal wiring
    6.
    发明授权
    Semiconductor device having seal wiring 有权
    具有密封接线的半导体器件

    公开(公告)号：US08841753B2

    公开(公告)日：2014-09-23

    申请号：US13428992

    申请日：2012-03-23

    申请人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    发明人： Koji Takemura ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    IPC分类号： H01L23/544

    CPC分类号： H01L23/585 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.

    摘要翻译： 半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。 当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20090200677A1

    公开(公告)日：2009-08-13

    申请号：US12430439

    申请日：2009-04-27

    申请人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    发明人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Masao Takahashi ,  Koji Koike

    IPC分类号： H01L23/522

    CPC分类号： H01L23/585 ,  H01L21/76832 ,  H01L23/522 ,  H01L23/53295 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.

    摘要翻译： 一种半导体器件包括在半导体衬底上的层间绝缘膜中堆叠的至少三个或更多个布线层，设置在半导体衬底的芯片区域的外周处的密封环和在芯片区域的一部分中提供的芯片强度增强 靠近密封圈。 芯片强度加强件由多个虚拟布线结构构成，并且多个虚设布线结构中的每一个形成为跨越两个或更多个布线层中的两个或更多个布线层，包括最下面的布线层和最上面的布线层 使用通孔部分。

    SEMICONDUCTOR DEVICE HAVING SEAL WIRING
    9.
    发明申请
    SEMICONDUCTOR DEVICE HAVING SEAL WIRING 有权
    具有密封接线的半导体器件

    公开(公告)号：US20120181670A1

    公开(公告)日：2012-07-19

    申请号：US13428992

    申请日：2012-03-23

    申请人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    发明人： Koji TAKEMURA ,  Hiroshige Hirano ,  Yutaka Itoh ,  Hikari Sano ,  Koji Koike

    IPC分类号： H01L23/00

    CPC分类号： H01L23/585 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.

    摘要翻译： 半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。 当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。