Insulated gate semiconductor device and driving circuit device and
electronic system both using the same
    1.
    发明授权
    Insulated gate semiconductor device and driving circuit device and electronic system both using the same 失效
    绝缘栅半导体器件和驱动电路器件和电子系统均采用相同的方式

    公开(公告)号:US5642252A

    公开(公告)日:1997-06-24

    申请号:US288729

    申请日:1994-08-15

    摘要: An improvement in conditions that protective functions of an insulated gate semiconductor device with a protection circuit incorporated therein are performed, an improvement in the cutoff of heating, the prevention of malfunctions and an improvement in ease of usage can be achieved.The insulated gate semiconductor device of the present invention comprises a power insulated gate semiconductor element (M9), at least one MOSFET (M1 through M7) for a protection circuit, for controlling the power insulated gate semiconductor element, a constant-voltage circuit using forward voltages developed across diodes (D2a through D2f) for the constant-voltage circuit, and voltage restricting diodes (D1 and D0a through D0d) for controlling the upper limit of a power supply voltage of the constant-voltage circuit. Power to be supplied to the voltage restricting diodes is supplied from an external gate terminal of the power insulated gate semiconductor element.The present invention can bring about an advantageous effect that an improvement in reliability of the insulated gate semiconductor device and an improvement in the ease of use can be achieved.

    摘要翻译: 可以实现具有并入其中的保护电路的绝缘栅半导体器件的保护功能的条件的改善,可以提高加热截止,防止故障和提高易用性。 本发明的绝缘栅半导体器件包括功率绝缘栅极半导体元件(M9),用于保护电路的至少一个MOSFET(M1至M7),用于控制功率绝缘栅极半导体元件,使用正向的恒压电路 用于恒压电路的二极管(D2a至D2f)上产生的电压以及用于控制恒压电路的电源电压的上限的电压限制二极管(D1和D0a至D0d)。 供电到限压二极管的功率从功率绝缘栅极半导体元件的外部栅极端子提供。 本发明可以实现提高绝缘栅极半导体器件的可靠性和提高易用性的有利效果。

    Compounded power MOSFET
    2.
    发明授权
    Compounded power MOSFET 失效
    复合功率MOSFET

    公开(公告)号:US5629542A

    公开(公告)日:1997-05-13

    申请号:US571766

    申请日:1995-12-13

    摘要: Provided is a compounded power MOSFET which has a high positive and negative withstand voltages for the drain terminal relative to the source terminal, and can be formed on a single chip based on the conventional fabrication process of power MOSFETs. Power MOSFETs 10 and 11 have their drains connected together, the MOSFET 10 has its source and gate used for the source terminal 0 and gate terminal 1, respectively, of the compounded power MOSFET 60, and the MOSFET 11 has its source used for the drain terminal 2. The compounded power MOSFET includes a voltage comparator 50 which drives the MOSFET 11 to turn off when the terminal 2 has a negative voltage, and a voltage transmitter 51 which is connected between the terminal 1 and the gate of the MOSFET 11 to block a current flowing from the terminal 2 to the terminal 1 by way of the circuit 50 and transfer the voltage of the terminal 1 to the gate of the MOSFET 11. The positive withstand voltage is provided by the MOSFET 10, and the negative withstand voltage is provided by the MOSFET 11.

    摘要翻译: 提供了一种复合功率MOSFET,其具有用于漏极端子相对于源极端子的高的正和负的耐受电压,并且可以基于功率MOSFET的常规制造工艺在单个芯片上形成。 功率MOSFET 10和11的漏极连接在一起,MOSFET 10的源极和栅极分别用于复合功率MOSFET 60的源极端子0和栅极端子1,并且MOSFET 11的源极用于漏极 复合功率MOSFET包括电压比较器50,其在端子2具有负电压时驱动MOSFET 11截止;以及电压发射器51,其连接在端子1和MOSFET 11的栅极之间以阻塞 通过电路50从端子2流到端子1的电流,并将端子1的电压传递到MOSFET 11的栅极。正极耐受电压由MOSFET10提供,负的耐压是 由MOSFET 11提供。