公开(公告)号：US08389410B2

公开(公告)日：2013-03-05

申请号：US13087356

申请日：2011-04-14

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/302

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

Abstract translation: 化学机械抛光工艺包括以下步骤：提供其上具有第一导电线的半导体衬底，然后在衬底和第一导电线上形成至少一个电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷（SiH4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠（SiH 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，通过介电层和盖层形成通孔，以及通过通路孔与第一导电线电连接的第二导线。

公开(公告)号：US07947603B2

公开(公告)日：2011-05-24

申请号：US11965757

申请日：2007-12-28

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/302

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a conductive interconnect includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

Abstract translation: 用于形成导电互连的化学机械抛光工艺包括以下步骤：提供其上具有第一导电线的半导体衬底，然后在衬底和第一导电线上形成至少一个电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷（SiH 4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠（SiH 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，通过介电层和盖层形成通孔，以及通过通路孔与第一导电线电连接的第二导线。

公开(公告)号：US20110189854A1

公开(公告)日：2011-08-04

申请号：US13087356

申请日：2011-04-14

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/768

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

Abstract translation: 化学机械抛光工艺包括以下步骤：提供其上具有第一导电线的半导体衬底，然后在衬底和第一导电线上形成至少一个电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷（SiH4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠（SiH 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，通过介电层和盖层形成通孔，以及通过通路孔与第一导电线电连接的第二导线。

公开(公告)号：US6077784A

公开(公告)日：2000-06-20

申请号：US132876

申请日：1998-08-11

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/3105 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L21/302

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/76819 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 .ANG. can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2 Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤：提供其上具有第一金属线的半导体衬底，然后在衬底和第一金属线上形成电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成薄盖层。 具有1000-3000厚度的薄盖层可以是例如二氧化硅层，磷硅酸盐玻璃层或富硅氧化物层。 形成盖层的方法包括使用硅烷（SiH4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠（SiH 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，形成通过介电层和盖层的通路开口，并且形成通过通路孔与第一金属线电连接的第二金属线。

公开(公告)号：US20080102635A1

公开(公告)日：2008-05-01

申请号：US11965757

申请日：2007-12-28

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/302

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a conductive interconnect includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

Abstract translation: 用于形成导电互连的化学机械抛光工艺包括以下步骤：提供其上具有第一导电线的半导体衬底，然后在衬底和第一导电线上形成至少一个电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷（SiH 4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠（SiH 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，通过介电层和盖层形成通孔，以及通过通路孔与第一导电线电连接的第二导线。

公开(公告)号：US07335598B2

公开(公告)日：2008-02-26

申请号：US11109896

申请日：2005-04-19

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/4763

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Angstroms can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤：提供其上具有第一金属线的半导体衬底，然后在衬底和第一金属线上形成电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成薄盖层。 具有1000-3000埃厚度的薄盖层可以是例如二氧化硅层，磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷（SiH 4 S 4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠（SiH 2 Cl 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，形成通过介电层和盖层的通路开口，并且形成通过通路孔与第一金属线电连接的第二金属线。

公开(公告)号：US20050186799A1

公开(公告)日：2005-08-25

申请号：US11109896

申请日：2005-04-19

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/3105 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/302 ,  H01L21/44

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Angstroms can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤：提供其上具有第一金属线的半导体衬底，然后在衬底和第一金属线上形成电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成薄盖层。 具有1000-3000埃厚度的薄盖层可以是例如二氧化硅层，磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷（SiH 4 S 4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠（SiH 2 Cl 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，形成通过介电层和盖层的通路开口，并且形成通过通路孔与第一金属线电连接的第二金属线。

公开(公告)号：US06913993B2

公开(公告)日：2005-07-05

申请号：US09990948

申请日：2001-11-20

Applicant: Kun-Lin Wu ,  Meng-Jin Tsai

Inventor： Kun-Lin Wu ,  Meng-Jin Tsai

IPC: H01L21/3105 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L21/4763

CPC classification number: H01L21/76829 ,  H01L21/31053 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/3185 ,  H01L21/76819 ,  H01L21/7684

Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Å can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤：提供其上具有第一金属线的半导体衬底，然后在衬底和第一金属线上形成电介质层。 接下来，使用化学 - 机械抛光方法来抛光电介质层的表面。 此后，在抛光的介电层上形成薄盖层。 厚度在1000-3000之间的薄盖层可以是例如二氧化硅层，磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷（SiH 4 S 4）或四乙基原硅酸盐（TEOS）作为主要反应剂的化学气相沉积法沉积氧化硅。 或者，可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠（SiH 2 Cl 2 Cl 2）作为主要反应剂沉积氮化硅来形成覆盖层。 最后，形成通过介电层和盖层的通路开口，并且形成通过通路孔与第一金属线电连接的第二金属线。

公开(公告)号：US06492240B1

公开(公告)日：2002-12-10

申请号：US09661701

申请日：2000-09-14

Applicant: Shyan-Yhu Wang ,  Kun-Lin Wu

Inventor： Shyan-Yhu Wang ,  Kun-Lin Wu

IPC: H01L2120

CPC classification number: H01L28/20 ,  H01L27/0629

Abstract: Performance of the high resistance resistor, which is polysilicon, is improved by treating the surface of the polysilicon layer in mixed signal integrated circuits for ADSL (Asymmetric Digital Subscriber Line) broadband service application. This treated surface of the polysilicon layer will prevent ions in the resistor from out-diffusion when performing an annealing step after forming the resistor.

Abstract translation: 通过在用于ADSL（非对称数字用户线）宽带服务应用的混合信号集成电路中处理多晶硅层的表面，改善了作为多晶硅的高电阻电阻的性能。 在形成电阻器之后，当执行退火步骤时，多晶硅层的该被处理表面将防止电阻器中的离子向外扩散。

公开(公告)号：US06190995B1

公开(公告)日：2001-02-20

申请号：US09208282

申请日：1998-12-08

Applicant: Kun-Lin Wu ,  Cheng-Jung Hsu

Inventor： Kun-Lin Wu ,  Cheng-Jung Hsu

IPC: H01L2176

CPC classification number: H01L21/76224

Abstract: A method of fabricating shallow trench isolation. A silicon oxide layer is formed on a substrate. The silicon oxide layer is patterned and a portion of the substrate is removed to form a trench within the substrate. A liner oxide layer is formed on the sidewall of the trench. An insulating layer is formed on the substrate and filled in the trench. A portion of the insulating layer is removed by CMP to expose the silicon oxide layer. The silicon oxide layer is removed and the STI structure is completed.

Abstract translation: 一种制造浅沟槽隔离的方法。 在基板上形成氧化硅层。 对氧化硅层进行构图，并且去除衬底的一部分以在衬底内形成沟槽。 衬垫氧化物层形成在沟槽的侧壁上。 在衬底上形成绝缘层并填充在沟槽中。 通过CMP去除绝缘层的一部分以暴露氧化硅层。 去除氧化硅层并完成STI结构。