CHEMICAL MECHANICAL POLISHING METHOD
    1.
    发明申请
    CHEMICAL MECHANICAL POLISHING METHOD 有权
    化学机械抛光方法

    公开(公告)号:US20110189854A1

    公开(公告)日:2011-08-04

    申请号:US13087356

    申请日:2011-04-14

    Abstract: A chemical-mechanical polishing process includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

    Abstract translation: 化学机械抛光工艺包括以下步骤:提供其上具有第一导电线的半导体衬底,然后在衬底和第一导电线上形成至少一个电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷(SiH4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠(SiH 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,通过介电层和盖层形成通孔,以及通过通路孔与第一导电线电连接的第二导线。

    Chemical-mechanical polishing method
    2.
    发明授权
    Chemical-mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US6077784A

    公开(公告)日:2000-06-20

    申请号:US132876

    申请日:1998-08-11

    Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 .ANG. can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2 Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

    Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤:提供其上具有第一金属线的半导体衬底,然后在衬底和第一金属线上形成电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成薄盖层。 具有1000-3000厚度的薄盖层可以是例如二氧化硅层,磷硅酸盐玻璃层或富硅氧化物层。 形成盖层的方法包括使用硅烷(SiH4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠(SiH 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,形成通过介电层和盖层的通路开口,并且形成通过通路孔与第一金属线电连接的第二金属线。

    CHEMICAL-MECHANICAL POLISHING METHOD
    3.
    发明申请
    CHEMICAL-MECHANICAL POLISHING METHOD 有权
    化学机械抛光方法

    公开(公告)号:US20080102635A1

    公开(公告)日:2008-05-01

    申请号:US11965757

    申请日:2007-12-28

    Abstract: A chemical-mechanical polishing process for forming a conductive interconnect includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

    Abstract translation: 用于形成导电互连的化学机械抛光工艺包括以下步骤:提供其上具有第一导电线的半导体衬底,然后在衬底和第一导电线上形成至少一个电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷(SiH 4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠(SiH 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,通过介电层和盖层形成通孔,以及通过通路孔与第一导电线电连接的第二导线。

    Chemical-mechanical polishing method
    4.
    发明授权
    Chemical-mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US07335598B2

    公开(公告)日:2008-02-26

    申请号:US11109896

    申请日:2005-04-19

    Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Angstroms can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

    Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤:提供其上具有第一金属线的半导体衬底,然后在衬底和第一金属线上形成电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成薄盖层。 具有1000-3000埃厚度的薄盖层可以是例如二氧化硅层,磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷(SiH 4 S 4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠(SiH 2 Cl 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,形成通过介电层和盖层的通路开口,并且形成通过通路孔与第一金属线电连接的第二金属线。

    Chemical-mechanical polishing method
    5.
    发明申请
    Chemical-mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US20050186799A1

    公开(公告)日:2005-08-25

    申请号:US11109896

    申请日:2005-04-19

    Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Angstroms can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

    Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤:提供其上具有第一金属线的半导体衬底,然后在衬底和第一金属线上形成电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成薄盖层。 具有1000-3000埃厚度的薄盖层可以是例如二氧化硅层,磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷(SiH 4 S 4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠(SiH 2 Cl 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,形成通过介电层和盖层的通路开口,并且形成通过通路孔与第一金属线电连接的第二金属线。

    Chemical-mechanical polishing method
    6.
    发明授权
    Chemical-mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US06913993B2

    公开(公告)日:2005-07-05

    申请号:US09990948

    申请日:2001-11-20

    Abstract: A chemical-mechanical polishing process for forming a metallic interconnect includes the steps of providing a semiconductor substrate having a first metallic line thereon, and then forming a dielectric layer over the substrate and the first metallic line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a thin cap layer is formed over the polished dielectric layer. The thin cap layer having a thickness of between 1000-3000 Å can be, for example, a silicon dioxide layer, a phosphosilicate glass layer or a silicon-rich oxide layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second metallic line that couples electrically with the first metallic line through the via opening is formed.

    Abstract translation: 用于形成金属互连的化学机械抛光工艺包括以下步骤:提供其上具有第一金属线的半导体衬底,然后在衬底和第一金属线上形成电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成薄盖层。 厚度在1000-3000之间的薄盖层可以是例如二氧化硅层,磷硅酸盐玻璃层或富硅氧化物层。 形成覆盖层的方法包括使用硅烷(SiH 4 S 4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠(SiH 2 Cl 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,形成通过介电层和盖层的通路开口,并且形成通过通路孔与第一金属线电连接的第二金属线。

    Chemical mechanical polishing method
    7.
    发明授权
    Chemical mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US08389410B2

    公开(公告)日:2013-03-05

    申请号:US13087356

    申请日:2011-04-14

    Abstract: A chemical-mechanical polishing process includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

    Abstract translation: 化学机械抛光工艺包括以下步骤:提供其上具有第一导电线的半导体衬底,然后在衬底和第一导电线上形成至少一个电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷(SiH4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅酸氢钠(SiH 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,通过介电层和盖层形成通孔,以及通过通路孔与第一导电线电连接的第二导线。

    Chemical-mechanical polishing method
    8.
    发明授权
    Chemical-mechanical polishing method 有权
    化学机械抛光方法

    公开(公告)号:US07947603B2

    公开(公告)日:2011-05-24

    申请号:US11965757

    申请日:2007-12-28

    Abstract: A chemical-mechanical polishing process for forming a conductive interconnect includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.

    Abstract translation: 用于形成导电互连的化学机械抛光工艺包括以下步骤:提供其上具有第一导电线的半导体衬底,然后在衬底和第一导电线上形成至少一个电介质层。 接下来,使用化学 - 机械抛光方法来抛光电介质层的表面。 此后,在抛光的介电层上形成覆盖层。 形成盖层的方法包括使用硅烷(SiH 4)或四乙基原硅酸盐(TEOS)作为主要反应剂的化学气相沉积法沉积氧化硅。 或者,可以通过使用化学气相沉积法以硅烷或二氯硅氢化钠(SiH 2 Cl 2)作为主要反应剂沉积氮化硅来形成覆盖层。 最后,通过介电层和盖层形成通孔,以及通过通路孔与第一导电线电连接的第二导线。

    Method of manufacturing shallow trench isolation structure
    9.
    发明授权
    Method of manufacturing shallow trench isolation structure 失效
    制造浅沟槽隔离结构的方法

    公开(公告)号:US06251748B1

    公开(公告)日:2001-06-26

    申请号:US09165257

    申请日:1998-10-01

    Applicant: Meng-Jin Tsai

    Inventor: Meng-Jin Tsai

    CPC classification number: H01L21/76229

    Abstract: A method of manufacturing shallow trench isolation structure comprising the steps of forming a polysilicon mask layer over a substrate, and then patterning the polysilicon mask layer and the substrate to form a trench. Thereafter, a silicon nitride layer is formed covering the sidewalls of the trench. Next, a high-density chemical vapor deposition method is used to deposit oxide material into the trench. Finally, the surface is polished to remove a portion of the oxide layer and the silicon nitride layer until the polysilicon mask layer is exposed. The shallow trench isolation structure can avoid subthreshold kink effect and reduce subthreshold leakage current.

    Abstract translation: 一种制造浅沟槽隔离结构的方法,包括以下步骤:在衬底上形成多晶硅掩模层,然后构图多晶硅掩模层和衬底以形成沟槽。 此后,形成覆盖沟槽的侧壁的氮化硅层。 接下来,使用高密度化学气相沉积方法将氧化物材料沉积到沟槽中。 最后,抛光该表面以去除氧化物层和氮化硅层的一部分,直到暴露多晶硅掩模层。 浅沟槽隔离结构可以避免亚阈值扭结效应,降低亚阈值漏电流。

    Dual damascene technique
    10.
    发明授权
    Dual damascene technique 失效
    双镶嵌技术

    公开(公告)号:US06001735A

    公开(公告)日:1999-12-14

    申请号:US110545

    申请日:1998-07-06

    Applicant: Meng-Jin Tsai

    Inventor: Meng-Jin Tsai

    CPC classification number: H01L21/76807

    Abstract: A method of forming a dual damascene structure includes forming an oxide layer and a mask layer there on, which both have protuberances over the conductive layers. Then a chemical mechanical polishing is performed to remove the protuberances and to form openings. The protuberances are above the conductive layers.

    Abstract translation: 形成双镶嵌结构的方法包括在其上形成氧化物层和掩模层,两者都具有在导电层上的突起。 然后进行化学机械抛光以去除突起并形成开口。 突起在导电层之上。

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