公开(公告)号：US07215399B2

公开(公告)日：2007-05-08

申请号：US11256003

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G09G3/34 ,  H01L31/036

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method of manufacturing an array substrate for a liquid crystal display device which includes forming a gate electrode, a gate line, and a gate pad on a substrate by sequentially depositing a metal layer and a transparent conductive layer and patterning, forming a gate insulating layer on the gate electrode, the gate line, and the gate pad, forming an active layer on the gate insulating layer over the gate electrode, forming an ohmic contact layer on the active layer, forming source and drain electrodes, a data line and a data pad on the ohmic contact layer, forming a pixel electrode, forming a data pad terminal covering the data pad, forming a passivation layer on the pixel electrode and the data pad terminal, exposing the gate pad by etching the passivation layer and the gate insulating layer, and exposing the data pad terminal by etching the passivation layer.

摘要翻译： 一种液晶显示装置用阵列基板的制造方法，其特征在于，通过依次层叠金属层和透明导电层，在基板上形成栅电极，栅极线和栅极焊盘，并形成栅极绝缘层 在栅极电极，栅极线和栅极焊盘上，在栅电极上的栅极绝缘层上形成有源层，在有源层上形成欧姆接触层，形成源极和漏极，数据线和数据 形成像素电极，形成覆盖数据焊盘的数据焊盘端子，在像素电极和数据焊盘端子上形成钝化层，通过蚀刻钝化层和栅极绝缘层露出栅极焊盘 并且通过蚀刻钝化层来曝光数据焊盘端子。

公开(公告)号：US20060038957A1

公开(公告)日：2006-02-23

申请号：US11256003

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/13

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method of manufacturing an array substrate for a liquid crystal display device which includes forming a gate electrode, a gate line, and a gate pad on a substrate by sequentially depositing a metal layer and a transparent conductive layer and patterning, forming a gate insulating layer on the gate electrode, the gate line, and the gate pad, forming an active layer on the gate insulating layer over the gate electrode, forming an ohmic contact layer on the active layer, forming source and drain electrodes, a data line and a data pad on the ohmic contact layer, forming a pixel electrode, forming a data pad terminal covering the data pad, forming a passivation layer on the pixel electrode and the data pad terminal, exposing the gate pad by etching the passivation layer and the gate insulating layer, and exposing the data pad terminal by etching the passivation layer.

摘要翻译： 一种液晶显示装置用阵列基板的制造方法，其特征在于，通过依次层叠金属层和透明导电层，在基板上形成栅电极，栅极线和栅极焊盘，并形成栅极绝缘层 在栅极电极，栅极线和栅极焊盘上，在栅电极上的栅极绝缘层上形成有源层，在有源层上形成欧姆接触层，形成源极和漏极，数据线和数据 形成像素电极，形成覆盖数据焊盘的数据焊盘端子，在像素电极和数据焊盘端子上形成钝化层，通过蚀刻钝化层和栅极绝缘层露出栅极焊盘 并且通过蚀刻钝化层来曝光数据焊盘端子。

公开(公告)号：US07525630B2

公开(公告)日：2009-04-28

申请号：US11256004

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/1345 ,  G02F1/1343 ,  H01L29/04 ,  G09G3/36

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method for manufacturing an array substrate for a display device, includes forming a gate electrode, a gate line, and a gate pad on a substrate, disposing a first metal mask on the gate pad, forming a gate insulating layer, an amorphous silicon layer, a doped silicon layer, and a metal layer on the substrate, removing the first metal mask, patterning the metal layer, the doped silicon layer, and the amorphous silicon layer to form source and drain electrodes, a data line, a data pad, an ohmic contact layer, and an active layer, forming a pixel electrode, forming a gate pad terminal and a data pad terminal covering the gate pad and the data pad, respectively, disposing second and third metal masks on the gate pad and data pad terminals, respectively, forming a passivation layer on the substrate, and removing the second and the third masks.

摘要翻译： 一种制造用于显示装置的阵列基板的方法，包括在基板上形成栅极电极，栅极线和栅极焊盘，在栅极焊盘上设置第一金属掩模，形成栅极绝缘层，非晶硅层 ，掺杂硅层和金属层，去除第一金属掩模，图案化金属层，掺杂硅层和非晶硅层以形成源极和漏极，数据线，数据焊盘， 欧姆接触层和有源层，形成像素电极，分别形成覆盖栅极焊盘和数据焊盘的栅极焊盘端子和数据焊盘端子，在栅极焊盘和数据焊盘端子上设置第二和第三金属掩模 分别在衬底上形成钝化层，并去除第二和第三掩模。

公开(公告)号：US06972820B2

公开(公告)日：2005-12-06

申请号：US10654488

申请日：2003-09-04

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  G02F1/1345 ,  G02F1/13 ,  G09G3/36

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method of manufacturing an array substrate for a liquid crystal display device which uses KAPTON tapes on the gate pad or data pad to expose the gate pad and the data pad after subsequent processing steps. The method can also adopt a double structure of a metal layer and a transparent conductive layer for a gate electrode and a gate pad. The method can also use a metal mask. A diffraction exposure technique can also be adopted to decrease manufacturing time and cost.

摘要翻译： 一种制造用于液晶显示装置的阵列基板的方法，其在栅极焊盘或数据焊盘上使用KAPTON带，以在后续处理步骤之后露出栅极焊盘和数据焊盘。 该方法还可以采用用于栅电极和栅极焊盘的金属层和透明导电层的双重结构。 该方法也可以使用金属掩模。 还可以采用衍射曝光技术来减少制造时间和成本。

公开(公告)号：US07760318B2

公开(公告)日：2010-07-20

申请号：US11255869

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/1345 ,  G09G3/36

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode, a gate line, and a gate pad on a substrate, forming a gate insulating layer on the gate electrode, the gate line, and the gate pad, forming an active layer on the gate insulating layer, forming an ohmic contact layer on the active layer, forming source and drain electrodes, a data line and a data pad on the ohmic contact layer, forming a pixel electrode, forming a gate pad terminal on the gate insulating layer, forming a data pad terminal covering the data pad, forming a passivation layer on the pixel electrode, the gate pad terminal and the data pad terminal, exposing the gate pad terminal and the gate pad by etching the passivation layer and the gate insulating layer, and exposing the data pad terminal by etching the passivation layer.

摘要翻译： 制造液晶显示装置用阵列基板的方法包括在基板上形成栅电极，栅极线，栅极焊盘，在栅电极，栅极线和栅极焊盘上形成栅极绝缘层， 在栅极绝缘层上形成有源层，在有源层上形成欧姆接触层，在欧姆接触层上形成源极和漏极，数据线和数据焊盘，形成像素电极，形成栅极焊盘端子 栅极绝缘层，形成覆盖数据焊盘的数据焊盘端子，在像素电极上形成钝化层，栅极焊盘端子和数据焊盘端子，通过蚀刻钝化层暴露栅极焊盘端子和栅极焊盘， 栅极绝缘层，并且通过蚀刻钝化层来暴露数据焊盘端子。

公开(公告)号：US20060038958A1

公开(公告)日：2006-02-23

申请号：US11256004

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/13

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method for manufacturing an array substrate for a display device, includes forming a gate electrode, a gate line, and a gate pad on a substrate, disposing a first metal mask on the gate pad, forming a gate insulating layer, an amorphous silicon layer, a doped silicon layer, and a metal layer on the substrate, removing the first metal mask, patterning the metal layer, the doped silicon layer, and the amorphous silicon layer to form source and drain electrodes, a data line, a data pad, an ohmic contact layer, and an active layer, forming a pixel electrode, forming a gate pad terminal and a data pad terminal covering the gate pad and the data pad, respectively, disposing second and third metal masks on the gate pad and data pad terminals, respectively, forming a passivation layer on the substrate, and removing the second and the third masks.

公开(公告)号：US20060038956A1

公开(公告)日：2006-02-23

申请号：US11255869

申请日：2005-10-24

申请人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

发明人： Kyoung-Mook Lee ,  Nack-Bong Choi ,  Seung-Hee Nam ,  Jae-Young Oh

IPC分类号： G02F1/13

CPC分类号： G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136295 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/66765

摘要： A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate electrode, a gate line, and a gate pad on a substrate, forming a gate insulating layer on the gate electrode, the gate line, and the gate pad, forming an active layer on the gate insulating layer, forming an ohmic contact layer on the active layer, forming source and drain electrodes, a data line and a data pad on the ohmic contact layer, forming a pixel electrode, forming a gate pad terminal on the gate insulating layer, forming a data pad terminal covering the data pad, forming a passivation layer on the pixel electrode, the gate pad terminal and the data pad terminal, exposing the gate pad terminal and the gate pad by etching the passivation layer and the gate insulating layer, and exposing the data pad terminal by etching the passivation layer.

摘要翻译： 制造液晶显示装置用阵列基板的方法包括在基板上形成栅电极，栅极线，栅极焊盘，在栅电极，栅极线和栅极焊盘上形成栅极绝缘层， 在栅极绝缘层上形成有源层，在有源层上形成欧姆接触层，在欧姆接触层上形成源极和漏极，数据线和数据焊盘，形成像素电极，形成栅极焊盘端子 栅极绝缘层，形成覆盖数据焊盘的数据焊盘端子，在像素电极上形成钝化层，栅极焊盘端子和数据焊盘端子，通过蚀刻钝化层暴露栅极焊盘端子和栅极焊盘， 栅极绝缘层，并且通过蚀刻钝化层来暴露数据焊盘端子。

公开(公告)号：US07061565B2

公开(公告)日：2006-06-13

申请号：US10685419

申请日：2003-10-16

申请人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

发明人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

IPC分类号： G02F1/1343 ,  G02F1/136 ,  H01L31/20 ,  H01L29/04 ,  H01L21/20

CPC分类号： G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124

摘要： An array substrate having double-layered metal patterns for use in a liquid crystal display device and a manufacturing method thereof are disclosed in the present invention. The array substrate includes a gate electrode and a gate line each having a molybdenum alloy (Mo-alloy) layer and a copper (Cu) layer configured sequentially on a substrate; a gate insulation layer on the substrate to cover the gate electrode and the gate line; an active layer arranged on the gate insulation layer in a portion over the gate electrode; an ohmic contact layer on the active layer; a data line on the gate insulation layer, the data line crossing the gate line and defining a pixel region; source and drain electrodes on the ohmic contact layer, the source electrode extending from the data line, and the drain electrode spaced apart from the source electrode; a passivation layer on the gate insulation layer covering the data line and the source and drain electrode, the passivation layer having a drain contact hole exposing a portion of the drain electrode; and a pixel electrode configured on the passivation layer in the pixel region, the pixel electrode electrically contacting the drain electrode through the drain contact hole.

摘要翻译： 在本发明中公开了具有用于液晶显示装置的双层金属图案的阵列基板及其制造方法。 阵列基板包括栅极电极和栅极线，每个栅极线均具有在基板上顺序配置的钼合金（Mo合金）层和铜（Cu）层; 栅极绝缘层，覆盖栅电极和栅极线; 位于所述栅电极上的部分上的所述栅极绝缘层上的有源层; 有源层上的欧姆接触层; 栅极绝缘层上的数据线，与栅极线交叉并限定像素区域的数据线; 欧姆接触层上的源极和漏极，从数据线延伸的源电极和与源电极间隔开的漏电极; 覆盖数据线和源极和漏极的栅极绝缘层上的钝化层，钝化层具有暴露出漏电极的一部分的漏极接触孔; 以及像素电极，其构造在所述像素区域中的所述钝化层上，所述像素电极通过所述漏极接触孔与所述漏电极电接触。

公开(公告)号：US20090227053A1

公开(公告)日：2009-09-10

申请号：US12320133

申请日：2009-01-16

申请人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

发明人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

IPC分类号： H01L21/283 ,  G02F1/13

CPC分类号： G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458

摘要： An array substrate having double-layered metal patterns for use in a liquid crystal display device and a manufacturing method thereof are disclosed in the present invention. The array substrate includes a gate electrode and a gate line each having a molybdenum alloy (Mo-alloy) layer and a copper (Cu) layer configured sequentially on a substrate; a gate insulation layer on the substrate to cover the gate electrode and the gate line; an active layer arranged on the gate insulation layer in a portion over the gate electrode; an ohmic contact layer on the active layer; a data line on the gate insulation layer, the data line crossing the gate line and defining a pixel region; source and drain electrodes on the ohmic contact layer, the source electrode extending from the data line, and the drain electrode spaced apart from the source electrode; a passivation layer on the gate insulation layer covering the data line and the source and drain electrode, the passivation layer having a drain contact hole exposing a portion of the drain electrode; and a pixel electrode configured on the passivation layer in the pixel region, the pixel electrode electrically contacting the drain electrode through the drain contact hole.

摘要翻译： 在本发明中公开了具有用于液晶显示装置的双层金属图案的阵列基板及其制造方法。 阵列基板包括栅极电极和栅极线，每个栅极线均具有在基板上顺序配置的钼合金（Mo合金）层和铜（Cu）层; 栅极绝缘层，覆盖栅电极和栅极线; 位于所述栅电极上的部分上的所述栅极绝缘层上的有源层; 有源层上的欧姆接触层; 栅极绝缘层上的数据线，与栅极线交叉并限定像素区域的数据线; 欧姆接触层上的源极和漏极，从数据线延伸的源电极和与源电极间隔开的漏电极; 覆盖数据线和源极和漏极的栅极绝缘层上的钝化层，钝化层具有暴露出漏电极的一部分的漏极接触孔; 以及像素电极，其构造在所述像素区域中的所述钝化层上，所述像素电极通过所述漏极接触孔与所述漏电极电接触。

公开(公告)号：US20060192907A1

公开(公告)日：2006-08-31

申请号：US11410815

申请日：2006-04-26

申请人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

发明人： Oh-Nam Kwon ,  Kyoung-Mook Lee ,  Nack-Bong Choi

IPC分类号： G02F1/136

CPC分类号： G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124

摘要： An array substrate having double-layered metal patterns for use in a liquid crystal display device and a manufacturing method thereof are disclosed in the present invention. The array substrate includes a gate electrode and a gate line each having a molybdenum alloy (Mo-alloy) layer and a copper (Cu) layer configured sequentially on a substrate; a gate insulation layer on the substrate to cover the gate electrode and the gate line; an active layer arranged on the gate insulation layer in a portion over the gate electrode; an ohmic contact layer on the active layer; a data line on the gate insulation layer, the data line crossing the gate line and defining a pixel region; source and drain electrodes on the ohmic contact layer, the source electrode extending from the data line, and the drain electrode spaced apart from the source electrode; a passivation layer on the gate insulation layer covering the data line and the source and drain electrode, the passivation layer having a drain contact hole exposing a portion of the drain electrode; and a pixel electrode configured on the passivation layer in the pixel region, the pixel electrode electrically contacting the drain electrode through the drain contact hole.