公开(公告)号：US08426308B2

公开(公告)日：2013-04-23

申请号：US13235717

申请日：2011-09-19

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Beak ,  Kyoung-hee Kim ,  Byung-Iyul Park ,  Byung-hee Kim

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Beak ,  Kyoung-hee Kim ,  Byung-Iyul Park ,  Byung-hee Kim

IPC分类号： H01L21/28 ,  H01L21/44 ,  H01L23/528

CPC分类号： H01L23/481 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A method of forming through silicon vias (TSVs) includes forming a primary via hole in a semiconductor substrate, depositing low-k dielectric material in the primary via hole, forming a secondary via hole by etching the low-k dielectric in the primary via hole, in such a manner that a via insulating layer and an inter metal dielectric layer of the low-k dielectric layer are simultaneously formed. The via insulating layer is formed of the low-k dielectric material on sidewalls and a bottom surface of the substrate which delimit the primary via hole and the inter metal dielectric layer is formed on an upper surface of the substrate. Then a metal layer is formed on the substrate including in the secondary via hole, and the metal layer is selectively removed from an upper surface of the semiconductor substrate.

摘要翻译： 通过硅通孔（TSV）形成的方法包括在半导体衬底中形成初级通孔，在初级通孔中沉积低k介电材料，通过蚀刻主通孔中的低k电介质形成次级通孔 以同时形成低k电介质层的通孔绝缘层和金属间介电层的方式。 通孔绝缘层由侧壁上的低k电介质材料和限定初级通孔的衬底的底表面形成，并且金属介电层形成在衬底的上表面上。 然后在包括在二次通孔中的基板上形成金属层，并且从半导体基板的上表面选择性地去除金属层。

公开(公告)号：US20120094437A1

公开(公告)日：2012-04-19

申请号：US13235717

申请日：2011-09-19

申请人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Baek ,  Kyoung-hee Kim ,  Byung-lyul Park ,  Byung-hee Kim

发明人： Kyu-hee Han ,  Sang-hoon Ahn ,  Jang-hee Lee ,  Jong-min Baek ,  Kyoung-hee Kim ,  Byung-lyul Park ,  Byung-hee Kim

IPC分类号： H01L21/50 ,  H01L21/768

CPC分类号： H01L23/481 ,  H01L21/76801 ,  H01L21/76825 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2924/00014 ,  H01L2224/05552

摘要： A method of forming through silicon vias (TSVs) includes forming a primary via hole in a semiconductor substrate, depositing low-k dielectric material in the primary via hole, forming a secondary via hole by etching the low-k dielectric in the primary via hole, in such a manner that a via insulating layer and an inter metal dielectric layer of the low-k dielectric layer are simultaneously formed. The via insulating layer is formed of the low-k dielectric material on sidewalls and a bottom surface of the substrate which delimit the primary via hole and the inter metal dielectric layer is formed on an upper surface of the substrate. Then a metal layer is formed on the substrate including in the secondary via hole, and the metal layer is selectively removed from an upper surface of the semiconductor substrate.

摘要翻译： 通过硅通孔（TSV）形成的方法包括在半导体衬底中形成初级通孔，在初级通孔中沉积低k介电材料，通过蚀刻主通孔中的低k电介质形成次级通孔 以同时形成低k电介质层的通孔绝缘层和金属间介电层的方式。 通孔绝缘层由侧壁上的低k电介质材料和限定初级通孔的衬底的底表面形成，并且金属介电层形成在衬底的上表面上。 然后在包括在二次通孔中的基板上形成金属层，并且从半导体基板的上表面选择性地去除金属层。