Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US08546883B2

    公开(公告)日:2013-10-01

    申请号:US12835523

    申请日:2010-07-13

    IPC分类号: H01L29/66

    摘要: A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.

    摘要翻译: 半导体器件包括在衬底上方构造的第二导电类型深阱。 深阱包括离子注入区域和扩散区域。 在扩散区域中形成第一导电型第一阱。 栅电极延伸在离子注入区域和扩散区域的部分上,并且部分地与第一阱重叠。 离子注入区域具有均匀的杂质浓度,而扩散区域的杂质浓度从在离子注入区域和扩散区域之间的边界界面处的最高浓度变为在扩散区域的部分处的最低浓度 距离边界界面最远。

    Display device
    3.
    发明授权
    Display device 有权
    显示设备

    公开(公告)号:US08422115B2

    公开(公告)日:2013-04-16

    申请号:US12197433

    申请日:2008-08-25

    IPC分类号: G02B26/00

    摘要: A display device is provided. The display device includes: a substrate including a unit display area, a fixing member that is formed on the substrate and that is electrically isolated, an insulating layer that is formed on the fixing member, a fixing electrode that is formed on the insulating layer and that is electrically connected to a power source, and a plurality of moving members with one end fixed to the insulating layer and positioned apart by a distance from the fixing electrode. The plurality of moving members and the fixing electrode are positioned within the unit display area.

    摘要翻译: 提供显示装置。 显示装置包括:基板,包括单元显示区域,形成在基板上并且被电隔离的固定部件,形成在固定部件上的绝缘层,形成在绝缘层上的固定电极和 电连接到电源,以及多个移动构件,其一端固定到绝缘层并且与固定电极分开一定距离。 多个移动构件和固定电极位于单元显示区域内。

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    6.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
    用于制造半导体器件的半导体器件和方法

    公开(公告)号:US20110127612A1

    公开(公告)日:2011-06-02

    申请号:US12882826

    申请日:2010-09-15

    IPC分类号: H01L27/088 H01L21/336

    摘要: A semiconductor device includes: an active region configured over a substrate to include a first conductive-type first deep well and second conductive-type second deep well forming a junction therebetween. A gate electrode extends across the junction and over a portion of first conductive-type first deep well and a portion of the second conductive-type second deep well. A second conductive-type source region is in the first conductive-type first deep well at one side of the gate electrode whereas a second conductive-type drain region is in the second conductive-type second deep well on another side of the gate electrode. A first conductive-type impurity region is in the first conductive-type first deep well surrounding the second conductive-type source region and extending toward the junction so as to partially overlap with the gate electrode and/or partially overlap with the second conductive-type source region.

    摘要翻译: 半导体器件包括:有源区,被配置在衬底上,以包括第一导电型第一深阱和第二导电型第二深阱,其形成两者之间的接合点。 栅极电极延伸穿过接头并且在第一导电类型的第一深阱的一部分和第二导电类型的第二深阱的一部分上延伸。 第二导电型源极区位于栅电极一侧的第一导电型第一深阱中,而第二导电型漏极区位于栅电极另一侧的第二导电型第二深阱中。 第一导电型杂质区位于围绕第二导电型源极区的第一导电类型的第一深阱中并且朝向结延伸以与栅电极部分重叠和/或部分地与第二导电型 源区。

    Heterojunction bipolar transistor and method of fabricating the same
    10.
    发明授权
    Heterojunction bipolar transistor and method of fabricating the same 失效
    异质结双极晶体管及其制造方法

    公开(公告)号:US07364977B2

    公开(公告)日:2008-04-29

    申请号:US10857655

    申请日:2004-05-28

    IPC分类号: H01L21/8222

    CPC分类号: H01L29/66318 H01L29/7371

    摘要: Disclosed are a heterojunction bipolar transistor and a method of fabricating the same. A first dielectric layer easily etched is deposited on the overall surface of a substrate before an isolation region is defined. The first dielectric layer and a sub-collector layer are selectively etched, and then a second dielectric layer etched at a low etch rate is deposited on the overall surface of the substrate. Via holes are formed in the first and second dielectric layers, and then the first dielectric layer is removed using a difference between etch characteristics of the first and second dielectric layers. Accordingly, a reduction in power gain, generated at the interface of a compound semiconductor and a dielectric insulating layer (the second dielectric layer), can be eliminated.

    摘要翻译: 公开了异质结双极晶体管及其制造方法。 在限定隔离区之前,易于蚀刻的第一电介质层沉积在基板的整个表面上。 选择性地蚀刻第一介电层和次集电极层,然后以低蚀刻速率蚀刻的第二电介质层沉积在基板的整个表面上。 在第一和第二电介质层中形成通孔,然后使用第一和第二电介质层的蚀刻特性之间的差异去除第一介电层。 因此,可以消除在化合物半导体和介电绝缘层(第二介电层)的界面处产生的功率增益的降低。