Abstract:
A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.
Abstract:
Discussed are a roll mold, a method for fabricating the same and a method for fabricating a thin film pattern using the same, which can prevent dimensional variation of the mold and simplify the overall process. The method for fabricating a thin film pattern includes providing a roll mold having a base roller provided with a light source, an adhesive resin layer formed on the base roller, a buffer layer formed on the adhesive resin layer, and a mold surface layer having a groove-protrusion shape formed on the buffer layer; forming a printing liquid on the roll mold or the substrate; and rolling the roll mold over the substrate to form a thin film pattern on the substrate. Also, the mold surface layer and the adhesive resin layer can be cured through light emitted from the light source arranged in the base roller.
Abstract:
A thin film transistor substrate and a method for fabricating the same are disclosed. A thin film transistor substrate includes a substrate comprising a plurality of grooves having different depths, respectively, to have a multi-step structure; gate and data lines alternatively crossed in the grooves to form a plurality of pixel areas; thin film transistors formed in the grooves of the substrate to be formed in cross portion of the gate and data lines, wherein active layers of the thin transistors are formed along the gate lines and gate electrodes, the active layers separated from active layers of neighboring pixel areas with the data line located there between.