公开(公告)号：US20150033065A1

公开(公告)日：2015-01-29

申请号：US14047239

申请日：2013-10-07

Applicant: LSI Corporation

Inventor： Timothy Canepa ,  Leonid Baryudin

IPC: G06F11/10

CPC classification number: G06F11/1008

Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a user area and a non-user area. The user area is generally enabled to store and retrieve data in a logical block address space of a host. The non-user area stores a failure-specific recovery routine. The controller may be communicatively coupled to the non-volatile memory. The controller is generally enabled, when operationally coupled to the host, (i) to respond to host commands to read and to write data into the user area of the non-volatile memory and (ii) upon detection of a predefined failure of a controller boot process, to respond to host read requests by returning the failure-specific recovery routine stored in the non-user area of the non-volatile memory.

Abstract translation: 一种装置包括非易失性存储器和控制器。 非易失性存储器包括用户区域和非用户区域。 通常，用户区域可以存储和检索主机的逻辑块地址空间中的数据。 非用户区域存储故障专用恢复例程。 控制器可以通信地耦合到非易失性存储器。 控制器通常在操作上耦合到主机时启用，（i）响应于主机命令来读取和写入数据到非易失性存储器的用户区域，以及（ii）在检测到控制器的预定义故障时 启动过程，以通过返回存储在非易失性存储器的非用户区域中的故障专用恢复例程来响应主机读取请求。

公开(公告)号：US20140379959A1

公开(公告)日：2014-12-25

申请号：US13941820

申请日：2013-07-15

Applicant: LSI Corporation

Inventor： Timothy Canepa ,  Leonid Baryudin ,  Stephen D. Hanna ,  Alex G. Tang

IPC: G06F12/02

CPC classification number: G06F3/0619 ,  G06F3/0608 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0652 ,  G06F3/0656 ,  G06F3/0658 ,  G06F3/0679 ,  G06F12/0246 ,  G06F12/0802 ,  G06F12/10 ,  G06F2212/1032 ,  G06F2212/1044 ,  G06F2212/214 ,  G06F2212/281 ,  G06F2212/312 ,  G06F2212/7205

Abstract: An apparatus having a processor and a circuit is disclosed. The processor is generally configured to initiate an operation to recycle a plurality of source blocks in a memory that is nonvolatile. The circuit is generally configured to (i) search through a first of a plurality of levels in a map that defines a plurality of translations between a plurality of logical addresses used at an interface to a computer and a plurality of physical addresses used in the memory and (ii) notify the processor in response to a detection in the first level of one or more of the source blocks to be recycled that contain valid data.

Abstract translation: 公开了一种具有处理器和电路的装置。 处理器通常被配置为发起操作以循环非易失性存储器中的多个源块。 电路通常被配置为（i）搜索在映射中的多个级别中的第一级，所述映射定义在与计算机的接口处使用的多个逻辑地址和在存储器中使用的多个物理地址之间的多个翻译 以及（ii）响应于在第一级中检测到包含有效数据的一个或多个要被回收的源块的检测通知处理器。

公开(公告)号：US09329931B2

公开(公告)日：2016-05-03

申请号：US14047239

申请日：2013-10-07

Applicant: LSI Corporation

Inventor： Timothy Canepa ,  Leonid Baryudin

IPC: G06F11/10

CPC classification number: G06F11/1008

Abstract: An apparatus includes a non-volatile memory and a controller. The non-volatile memory includes a user area and a non-user area. The user area is generally enabled to store and retrieve data in a logical block address space of a host. The non-user area stores a failure-specific recovery routine. The controller may be communicatively coupled to the non-volatile memory. The controller is generally enabled, when operationally coupled to the host, (i) to respond to host commands to read and to write data into the user area of the non-volatile memory and (ii) upon detection of a predefined failure of a controller boot process, to respond to host read requests by returning the failure-specific recovery routine stored in the non-user area of the non-volatile memory.

Abstract translation: 一种装置包括非易失性存储器和控制器。 非易失性存储器包括用户区域和非用户区域。 通常，用户区域可以存储和检索主机的逻辑块地址空间中的数据。 非用户区域存储故障专用恢复例程。 控制器可以通信地耦合到非易失性存储器。 控制器通常在操作上耦合到主机时启用，（i）响应于主机命令来读取和写入数据到非易失性存储器的用户区域，以及（ii）在检测到控制器的预定义故障时 启动过程，以通过返回存储在非易失性存储器的非用户区域中的故障专用恢复例程来响应主机读取请求。

公开(公告)号：US20140344492A1

公开(公告)日：2014-11-20

申请号：US14277920

申请日：2014-05-15

Applicant: LSI Corporation

Inventor： Nital Patwa ,  Timothy Canepa ,  Yimin Chen

IPC: G06F13/24

CPC classification number: G06F13/24 ,  G06F2213/2408 ,  Y02D10/14

Abstract: A storage controller of a data storage system maintains, for each interrupt vector, (1) a pending status that indicates whether one or more completions are pending in the completion queue (CQ) associated with the interrupt vector, and (2) an in-progress status that indicates whether or not the storage controller is currently in the process of composing an interrupt. The storage controller utilizes these two statuses to reduce or eliminate spurious interrupts by preventing an interrupt from being composed if there are no completions in the CQ, by preventing an interrupt from being composed if the corresponding interrupt mask has been set before composition of the interrupt begins, and by preventing an interrupt from being sent to the host system in cases where the interrupt mask was set after composition of the interrupt began, but before the interrupt has been sent to the host system.

Abstract translation: 数据存储系统的存储控制器为每个中断向量维护（1）指示在与中断向量相关联的完成队列（CQ）中是否有一个或多个完成正在等待的挂起状态，以及（2） 指示存储控制器当前是否正在组成中断的进度状态。 存储控制器利用这两种状态通过防止在CQ中没有完成的情况下通过防止中断被组合来减少或消除假中断，如果在中断组合开始之前已经设置了相应的中断屏蔽，则防止中断被组合 并且在组合中断开始之后但在中断被发送到主机系统之前中止屏蔽被设置的情况下，通过防止中断被发送到主机系统。

公开(公告)号：US08775687B1

公开(公告)日：2014-07-08

申请号：US13917299

申请日：2013-06-13

Applicant: LSI Corporation

Inventor： Yang Liu ,  Nital Patwa ,  Changyou Xu ,  Timothy Canepa ,  Chien Chen

IPC: G06F3/06 ,  G06F13/12

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0688

Abstract: A method for processing a read sub-command in a secondary storage controller is disclosed. The method includes receiving the read sub-command from a primary storage controller; retrieving data in response to the read sub-command; utilizing a write request to write the retrieved data directly to a memory accessible by a host device; issuing an additional request to the same memory after the write request; receiving an indication of completion of the additional request; and reporting a sub-completion status to the primary storage controller.

Abstract translation: 公开了一种在二次存储控制器中处理读取子命令的方法。 该方法包括从主存储控制器接收读取的子命令; 响应于读取的子命令检索数据; 利用写请求将所检索的数据直接写入由主机设备可访问的存储器; 在写请求之后向相同的存储器发出附加请求; 接收附加请求完成的指示; 并向主存储控制器报告子完成状态。