公开(公告)号：US06429119B1

公开(公告)日：2002-08-06

申请号：US09405059

申请日：1999-09-27

申请人： Li-Chih Chao ,  Chia-Shiung Tsai ,  Ming-Huei Lui ,  Jen-Cheng Liu ,  Chao-Cheng Chen

发明人： Li-Chih Chao ,  Chia-Shiung Tsai ,  Ming-Huei Lui ,  Jen-Cheng Liu ,  Chao-Cheng Chen

IPC分类号： H01L214763

CPC分类号： H01L21/76808 ,  H01L21/76813 ,  H01L2221/1063

摘要： Using this special dual damascene process, interconnect conducting lines and via contacts are formed which have low parasitic capacitance (low RC time constants). The invention incorporates the use of thin etch stop or etch barrier layers. The key process steps of this invention are a special partial via hole etch and a special via hole liner. The Prior Art dual damascene processes are generally composed of a thick via etch stop layer to avoid damaging underlying Cu during via patterning, as well as, a thick trench etch stop layer to avoid via hole facet during trench patterning. Thick etch stop layers are undesirably due to high dielectric constant values compared with silicon oxide, the intermetal dielectric (IMD). Therefore, the thickness of stop-layer should be reduced to minimize the circuit (RC) time constant delay. In general, there are two main approaches for dual damascene etching. One of the main approaches use self-aligned dual damascene (SADD) etching which requires a thick trench etching stop-layer thickness. The other approach use counter-bore method which requires a thick via etching stop-layer thickness. This invention describes a novel dual damascene process which can minimize the thickness of both via and trench etching stop-layer, while avoiding deleterious damage to the underlying to and via facet profile during via and trench etching.

摘要翻译： 使用这种特殊的双镶嵌工艺，形成具有低寄生电容（低RC时间常数）的互连导线和通孔触点。 本发明包括使用薄蚀刻停止层或蚀刻阻挡层。 本发明的关键工艺步骤是特殊的部分通孔蚀刻和特殊通孔衬垫。 现有技术的双镶嵌工艺通常由厚的通孔蚀刻停止层组成，以避免在通孔图案化期间损坏下面的铜，以及在沟槽图案化期间避免通孔小面的厚沟槽蚀刻停止层。 与氧化硅（金属间电介质（IMD））相比，由于高的介电常数值，厚的蚀刻停止层是不期望的。 因此，应该减小停止层的厚度以最小化电路（RC）时间常数延迟。 一般来说，双镶嵌蚀刻有两种主要方法。 主要方法之一使用自对准双镶嵌（SADD）蚀刻，其需要厚沟槽蚀刻停止层厚度。 另一种方法使用需要厚通孔蚀刻停止层厚度的反孔法。 本发明描述了一种新颖的双镶嵌工艺，其可以最小化通孔和沟槽蚀刻停止层的厚度，同时避免在通孔和沟槽蚀刻期间对于底面和经过小面轮廓的有害损伤。

公开(公告)号：US06323121B1

公开(公告)日：2001-11-27

申请号：US09570018

申请日：2000-05-12

申请人： Jen-Cheng Liu ,  Chao-Cheng Chen ,  Li-Chih Chao ,  Chia-Shiung Tsai ,  Ming-Huei Lui

发明人： Jen-Cheng Liu ,  Chao-Cheng Chen ,  Li-Chih Chao ,  Chia-Shiung Tsai ,  Ming-Huei Lui

IPC分类号： H01L214763

CPC分类号： H01L21/02063 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76807

摘要： A method is described for cleaning freshly etched dual damascene via openings and preparing them for copper fill without damage or contamination of exposed organic or other porous low-k insulative layers. The method is entirely dry and does not expose the porous materials to contamination from moisture or solvents. The method is effective for removing all traces of residual polymer deposits from an in-process substrate wafers after via or damascene trench etching. The method employs an in-situ three-step treatment comprising a first step of exposing the electrically biased substrate wafer to a O2/N2 ashing plasma to remove photoresist and polymers, a second step immediately following the first step of remove silicon nitride etch stop layers, and a final step of treating the wafer with H2/N2 to remove copper polymer deposits formed during nitride removal. The H2/N2 plasma is capable of removing the difficult polymer residues which are otherwise only removable by wet stripping procedures. The H2/N2 plasma is not harmful to exposed porous low-k dielectric layers as well as copper metallurgy.

摘要翻译： 描述了一种用于通过开口清洁新鲜蚀刻的双镶嵌件的方法，并且它们用于铜填充而不损坏或污染暴露的有机或其它多孔低k绝缘层。 该方法是完全干燥的，并且不会使多孔材料暴露于水分或溶剂的污染物中。 该方法对于在通孔或镶嵌沟槽蚀刻之后从工艺衬底晶片去除残余聚合物沉积物的所有迹线是有效的。 该方法采用原位三步处理，其包括将电偏置的衬底晶片暴露于O 2 / N 2灰分等离子体以去除光致抗蚀剂和聚合物的第一步骤，紧接着在去除氮化硅蚀刻停止层的第一步骤之后的第二步骤 ，以及用H2 / N2处理晶片以除去在氮化物除去期间形成的铜聚合物沉积物的最后步骤。 H 2 / N 2等离子体能够去除困难的聚合物残余物，否则其仅可通过湿式剥离方法除去。 H2 / N2等离子体对暴露的多孔低k电介质层以及铜冶金无害。

公开(公告)号：US06211061B1

公开(公告)日：2001-04-03

申请号：US09431536

申请日：1999-10-29

申请人： Chao-Cheng Chen ,  Ming-Huei Lui ,  Jen-Cheng Liu ,  Li-chih Chao ,  Chia-Shiung Tsai

发明人： Chao-Cheng Chen ,  Ming-Huei Lui ,  Jen-Cheng Liu ,  Li-chih Chao ,  Chia-Shiung Tsai

IPC分类号： H01L214763

CPC分类号： H01L21/76808

摘要： A method for forming a dual damascene structure in a carbon-based, low-K material. The process begins by providing a semiconductor structure having a first metal pattern thereover, wherein the first metal pattern has a first barrier layer thereon. An organic dielectric layer is formed on the first barrier layer, and a hard mask layer is formed on the dielectric layer. The hard mask layer and the dielectric layer are patterned to form a trench. A second barrier layer is formed over the hard mask layer and on the bottom and sidewalls of the trench. A barc layer is formed over the second barrier layer, thereby filling the trench. The barc layer, the second barrier layer, and the dielectric layer are patterned to form a via opening, preferably using a photoresist mask. The barc layer is patterned without faceting the edges of the via opening due to the second barrier layer. The barc layer and the etch mask are removed by the dielectric layer etch. The first barrier layer and the second barrier layer are removed. A third barrier layer is formed on the bottom and sidewalls of the trench, on the sidewalls of the via opening, and on the first metal pattern through the via opening. The trench and the via opening are filled with metal to form a damascene structure.

摘要翻译： 一种在碳基低K材料中形成双镶嵌结构的方法。 该过程开始于提供其上具有第一金属图案的半导体结构，其中第一金属图案在其上具有第一阻挡层。 在第一阻挡层上形成有机电介质层，在电介质层上形成硬掩模层。 图案化硬掩模层和电介质层以形成沟槽。 第二阻挡层形成在硬掩模层之上以及沟槽的底部和侧壁上。 在第二阻挡层上形成棒状层，由此填充沟槽。 将棒状层，第二阻挡层和电介质层图案化以形成通孔，优选使用光致抗蚀剂掩模。 由于第二阻挡层，棒状层被图案化而不使通孔开口的边缘刻划。 通过电介质层蚀刻去除棒状层和蚀刻掩模。 去除第一阻挡层和第二阻挡层。 第三阻挡层形成在沟槽的底部和侧壁上，通孔开口的侧壁上，通过通孔开口形成在第一金属图案上。 沟槽和通孔开口用金属填充以形成镶嵌结构。

公开(公告)号：US06399483B1

公开(公告)日：2002-06-04

申请号：US09624523

申请日：2000-07-24

申请人： Jen-Cheng Liu ,  Ming-Huei Lui ,  Hun-Jan Tao ,  Chia Shiung Tsai

发明人： Jen-Cheng Liu ,  Ming-Huei Lui ,  Hun-Jan Tao ,  Chia Shiung Tsai

IPC分类号： H01L214763

CPC分类号： H01L21/76814 ,  H01L21/76808 ,  H01L2221/1063

摘要： A new method is provided for creating the interconnect pattern for dual damascene structures. The dual damascene structure is created in two overlying levels of dielectric, a first etch stop layer is deposited over the surface of the substrate, a second etch stop layer is deposited between the two layers of dielectric. A first etch penetrates both layers of dielectric, a second etch penetrates the top dielectric layer. Before the second etch is performed, a layer of ARC is deposited. For the second etch a polymer rich etchant is used to protect the sidewalls of the opening. The second etch leaves in place a fence of material (containing C, H, F and oxide compounds) that is formed around the upper perimeter of the opening through the lower layer of dielectric. This fence protects the upper corners of the lower opening of the dual damascene structure and is removed in a two step procedure. At the completion of this two step procedure the upper corners of the lower opening of the dual damascene structure have retained a rectangular profile. A final step removes the photoresist (that has been used to create the interconnect line opening) from the surface of the second layer of dielectric while the remnants of the ARC material are also removed.

摘要翻译： 提供了一种用于创建双镶嵌结构的互连图案的新方法。 双镶嵌结构在两个相邻的电介质层上产生，第一蚀刻停止层沉积在衬底的表面上，第二蚀刻停止层沉积在两层介电层之间。 第一蚀刻穿透两层电介质，第二蚀刻穿透顶部电介质层。 在执行第二蚀刻之前，沉积ARC层。 对于第二蚀刻，使用聚合物富集的蚀刻剂来保护开口的侧壁。 第二蚀刻留下了通过下电介质的开口周围形成的材料（含有C，H，F和氧化物化合物）的栅栏。 该栅栏保护双镶嵌结构的下开口的上角，并以两步程序移除。 在完成这个两步骤程序后，双镶嵌结构的下开口的上角保留了矩形轮廓。 最后一步从电介质的第二层的表面去除光致抗蚀剂（已用于形成互连线开口），而ARC材料的残余物也被去除。

公开(公告)号：US06440838B1

公开(公告)日：2002-08-27

申请号：US09996458

申请日：2001-11-20

申请人： Ming-Huei Lui ,  Mei-Hui Sung

发明人： Ming-Huei Lui ,  Mei-Hui Sung

IPC分类号： H01L214763

CPC分类号： H01L21/76832 ,  H01L21/7681 ,  H01L21/76835

摘要： Within a dual damascene method for forming a dual damascene aperture within a microelectronic fabrication there is employed a bottom etch stop layer formed of a first material and an intermediate etch stop layer formed as a laminate of a second material having formed thereupon a third material. Within the method, the second material serves as an etch stop for the first material and the third material, which may be identical materials. Within the method, there may be etched completely through the bottom etch stop layer to reach a contact region formed there beneath while not etching completely through the intermediate etch stop layer to reach a first dielectric layer formed there beneath.

摘要翻译： 在用于在微电子制造中形成双镶嵌孔的双镶嵌方法中，采用由第一材料形成的底部蚀刻停止层和形成为具有第三材料的第二材料的叠层的中间蚀刻停止层。 在该方法中，第二材料用作用于第一材料和第三材料的蚀刻停止件，其可以是相同的材料。 在该方法中，可以通过底部蚀刻停止层完全蚀刻到达其下形成的接触区域，而不通过中间蚀刻停止层完全蚀刻，以到达其下方形成的第一介电层。

公开(公告)号：US06647994B1

公开(公告)日：2003-11-18

申请号：US10038709

申请日：2002-01-02

申请人： Ming-Huei Lui ,  Mei-Hui Sung

发明人： Ming-Huei Lui ,  Mei-Hui Sung

IPC分类号： H01L21302

CPC分类号： H01L21/31138 ,  G03F7/427

摘要： An improved and new process for photoresist stripping for use during fabrication of semiconductor integrated circuits, which use porous low-k dielectric materials, such as OSG or HSQ, as the interlevel and intra-level insulating layers, has been developed. Photoresist stripping in microwave or rf generated plasmas in gaseous mixtures of NH3 and CO takes place without attack or damage to underlying layers of OSG or HSQ. Optimum results are obtained when the ratio of CO to NH3 is between about 0.8 and 1.2.

摘要翻译： 已经开发了一种用于光致抗蚀剂剥离的改进的新方法，其用于制造半导体集成电路期间，其使用诸如OSG或HSQ的多孔低k电介质材料作为层间和层内绝缘层。 在NH3和CO的气体混合物中的微波或rf产生的等离子体中的光致抗蚀剂剥离不会对OSG或HSQ的下层产生攻击或损坏。 当CO与NH 3的比例在约0.8和1.2之间时，获得最佳结果。