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    Modular DIMM carrier and riser slot
    3.
    发明授权
    Modular DIMM carrier and riser slot 失效
    模块化DIMM载体和提升槽

    公开(公告)号：US07729126B2

    公开(公告)日：2010-06-01

    申请号：US11882263

    申请日：2007-07-31

    申请人： Michael Bozich Calhoun ,  Dennis Carr ,  Ricardo Ernesto Espinoza-Ibarra ,  Teddy Lee ,  Lidia Warnes

    发明人： Michael Bozich Calhoun ,  Dennis Carr ,  Ricardo Ernesto Espinoza-Ibarra ,  Teddy Lee ,  Lidia Warnes

    IPC分类号： H05K7/18

    CPC分类号： H01R12/82 ,  H01R27/00

    摘要： A modular DIMM carrier and riser slot device includes a slot section having a slot configured to hold a plurality of memory device planars, a first latch disposed at a first end of the slot section and pivotably connected to the slot section and capable of securing a first end of the memory device planars; a second latch disposed at a second end of the slot section and pivotably connected to the slot section and capable of securing a second end of a first memory device planar, and a third latch pivotably connected to the slot section and disposed intermediate between the first and the second latches, the third latch capable of securing a second end of a second memory device planar. The slot section has an auxiliary slot section defined as an section between the second latch and the third latch. The auxiliary slot section includes a notch for receiving the third latch when the third latch is in a disengaged position, a retention notch that restrains movement of the third latch when the third latch is in an engaged position, and a power and signaling section that includes power and signaling connections usable by one or more of the memory device planars.

    摘要翻译： 模块化的DIMM载体和提升槽设备包括具有配置成保持多个存储器设备平面的槽的槽部分，第一闩锁，其设置在槽部分的第一端处并且可枢转地连接到槽部分并且能够固定第一 内存设备平面结束; 第二闩锁，其设置在所述狭槽部分的第二端处并且可枢转地连接到所述狭槽部分并且能够固定第一存储装置平面的第二端，以及第三闩锁，其可枢转地连接到所述狭槽部分并且设置在所述第一和第 第二锁存器，第三锁存器能够固定第二存储器件平面的第二端。 狭缝部分具有限定为第二闩锁和第三闩锁之间的部分的辅助狭缝部分。 所述辅助槽部包括用于当所述第三闩锁处于分离位置时接收所述第三闩锁的凹口，当所述第三闩锁处于接合位置时限制所述第三闩锁的移动的保持凹口，以及包括 功率和信令连接可由一个或多个存储器设备平面使用。

    Parallel memory device rank selection
    6.
    发明授权
    Parallel memory device rank selection 有权
    并行存储设备等级选择

    公开(公告)号：US07996602B1

    公开(公告)日：2011-08-09

    申请号：US11796903

    申请日：2007-04-30

    申请人： Lidia Warnes ,  Teddy Lee ,  Ricardo Ernesto Espinoza-Ibarra ,  Dennis Carr ,  Michael Bozich Calhoun

    发明人： Lidia Warnes ,  Teddy Lee ,  Ricardo Ernesto Espinoza-Ibarra ,  Dennis Carr ,  Michael Bozich Calhoun

    IPC分类号： G06F12/06

    CPC分类号： G11C5/04

    摘要： A translator of an apparatus in an example selects one or more ranks of parallel memory devices from a plurality of available ranks of parallel memory devices in a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered and/or unbuffered DIMMs) through employment of a native fully buffered dual in-line memory module protocol (native FB-DIMM protocol).

    摘要翻译： 示例中的设备的翻译器从多个双数据速率注册和/或非缓冲双列直插存储器模块中的多个可用并行存储器设备级别中选择一个或多个并行存储器设备（DDR注册和/ 或非缓冲DIMM），通过使用本机完全缓冲双列直插式内存模块协议（本机FB-DIMM协议）。