摘要:
A communications device including communications circuitry, tunable filter circuitry including a node configured to pass a signal between an antenna and the communication circuitry, and control circuitry configured to cause energy in the tunable filter circuitry to be adjusted for a time period and configured to determine a resonant frequency of the tunable filter circuitry from oscillations on the node caused by the energy subsequent to the time period is provided.
摘要:
A communications device including communications circuitry, tunable filter circuitry including a node configured to pass a signal between an antenna and the communication circuitry, and control circuitry configured to cause energy in the tunable filter circuitry to be adjusted for a time period and configured to determine a resonant frequency of the tunable filter circuitry from oscillations on the node caused by the energy subsequent to the time period is provided.
摘要:
A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.
摘要:
A variable capacitance circuit includes a first and a second capacitor. A switch having an associated first nonlinear capacitance, selectively couples the first and second capacitors. To compensate for the first nonlinear capacitance, a second nonlinear capacitance is coupled to the switch that has a capacitance value responsive to a change in voltage that moves in a direction of change opposite to a direction of change of the first nonlinear capacitance.
摘要:
A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.
摘要:
A variable capacitance circuit includes a first and a second capacitor. A switch having an associated first nonlinear capacitance, selectively couples the first and second capacitors. To compensate for the first nonlinear capacitance, a second nonlinear capacitance is coupled to the switch that has a capacitance value responsive to a change in voltage that moves in a direction of change opposite to a direction of change of the first nonlinear capacitance.
摘要:
A PLL function may be implemented as a dual-loop structure having a first PLL circuit which generates an intermediate signal from the reference signal, and a second PLL circuit which generates an output signal from the intermediate signal. The intermediate signal frequency is preferably chosen at a value in which potential interference signals do not have much energy. The first loop preferably has low bandwidth to provide good input jitter attenuation, while second loop preferably has higher bandwidth to reduce phase noise of the output signal. The circuit preferably provides for a choice of several different intermediate frequencies to allow use where different intermediate frequencies may exist in each system. Moreover, in a system having two such dual-loop PLL circuits, each can be configured with a different intermediate frequency, so that interference from one to the other is reduced.
摘要:
Methods and systems are disclosed for automatic detection of channel spacing for broadcast bands in different regions that use different channel spacing. Using the described embodiments, channel spacing at a users' current location can be automatically detected so that manual settings by the user are not necessary, especially when a user travels with his/her radio across regions that use different channel spacing for radio broadcasting bands. This auto-detected channel spacing can then be used for later channel searching by the radio. More particularly, methods and systems are disclosed for auto-detection of channel spacing for AM broadcasts using different channel spacings, such as the standard 9 kHz and 10 kHz spacings, used today in different geographic regions of the world for AM broadcast bands.
摘要:
A region of high metal density may be placed in metal layers proximate to an area of low metal density below an inductor on an integrated circuit without violating manufacturing design rules for reducing manufacturing defects and without substantially impacting performance of the inductor. These results are achieved by including a transitional region that includes conductive structures electrically isolated from each other between the region of high metal density and the region of low metal density. The transitional region has a structure that allows a negligible amount of current flow to be induced in the structure.
摘要:
A region of high metal density may be placed in metal layers proximate to an area of low metal density below an inductor on an integrated circuit without violating manufacturing design rules for reducing manufacturing defects and without substantially impacting performance of the inductor. These results are achieved by including a transitional region that includes conductive structures electrically isolated from each other between the region of high metal density and the region of low metal density. The transitional region has a structure that allows a negligible amount of current flow to be induced in the structure.